On Thu, 23 Aug 2012, Brad Smith wrote:
On Thu, Aug 23, 2012 at 09:37:44PM +1000, Jonathan Gray wrote:
On Thu, Aug 23, 2012 at 07:33:37AM -0400, Brad Smith wrote:
On Thu, Aug 23, 2012 at 09:30:03PM +1000, Jonathan Gray wrote:
On Thu, Aug 23, 2012 at 01:11:24AM -0400, Brad Smith wrote:
On Thu, Aug 23, 2012 at 02:56:16PM +1000, Jonathan Gray wrote:
On Tue, Aug 21, 2012 at 02:48:59PM -0400, Brian Callahan wrote:
I noticed that devel/llvm now has target support for mips64 and
mips64el. The following patch is needed for those two archs. LLVM
builds and seems to work OK from my admittedly basic testing on
mips64el.
Clang builds only with a newer version of gas (I used 2.22) but it
does not compile anything; it crashes when you try to compile even a
simple Hello World. I've reported it upstream but I'm unable to
follow any of their suggestions - my yeeloong cannot compile clang
with -O0 or a debug build because it runs out of memory (ulimit -d
is maxed at 1G in the kernel).
Thanks.
~Brian
You'll likely want the following as well. mips binutils is very
fragile, I doubt you want 2.22 and 2.17 in the tree needs more work
for mips64.
The additions of __MIPSEB__/__MIPSEL__ and __mips__ are redundant
over what is already there. __mips64__ is fine.
actually it is required, in the kernel alone:
$ fgrep -r __mips__ /usr/src/sys/* | wc -l
10
$ fgrep -r __MIPSEL__ /usr/src/sys/* | wc -l
15
$ fgrep -r __MIPSEB__ /usr/src/sys/* | wc -l
22
What I mean is the existing config already has those symbols set.
ah, seems you are correct indeed. It is strange how __x86_64__ is
explictly set then.
Some of the symbols are provided without the underscores on each side
like i386/mips/sparc only when in GNU mode (-std=gnu99) to mimic what
GCC does but they probably don't want to add more unless GCC was already
doing so in the past so newer symbols like for amd64 do not do that.
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To comment on my other build issue:
when building src/lib/Target/Mips/MipsJITInfo.cpp
I get a whole lot of assembler messages with illegal operands.
But I fixed it with the patch below. It's still building so I don't know
yet if it fixes the clang issue (my gut feeling is no) but now we can at
least build everything without external tools.
Someone should look at that assembly, it feels wrong to me for mips64 by
eyeballing it. Is it OK to only count 4 between registers like that?
Thanks.
~Brian
Index: patch-lib_Target_Mips_MipsJITInfo_cpp
===================================================================
RCS file: patch-lib_Target_Mips_MipsJITInfo_cpp
diff -N patch-lib_Target_Mips_MipsJITInfo_cpp
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patch-lib_Target_Mips_MipsJITInfo_cpp 23 Aug 2012 15:13:19 -0000
@@ -0,0 +1,74 @@
+$OpenBSD$
+--- lib/Target/Mips/MipsJITInfo.cpp.orig Thu Aug 23 10:58:51 2012
++++ lib/Target/Mips/MipsJITInfo.cpp Thu Aug 23 11:08:46 2012
+@@ -57,11 +57,11 @@ void MipsCompilationCallback();
+ ".globl " ASMPREFIX "MipsCompilationCallback\n"
+ ASMPREFIX "MipsCompilationCallback:\n"
+ ".ent " ASMPREFIX "MipsCompilationCallback\n"
+- ".frame $sp, 32, $ra\n"
++ ".frame $29, 32, $31\n"
+ ".set noreorder\n"
+- ".cpload $t9\n"
++ ".cpload $25\n"
+
+- "addiu $sp, $sp, -64\n"
++ "addiu $29, $29, -64\n"
+ ".cprestore 16\n"
+
+ // Save argument registers a0, a1, a2, a3, f12, f14 since they may contain
+@@ -70,35 +70,35 @@ void MipsCompilationCallback();
+ // concerned. We also need to save the ra register since it contains the
+ // original return address, and t8 register since it contains the address
+ // of the end of function stub.
+- "sw $a0, 20($sp)\n"
+- "sw $a1, 24($sp)\n"
+- "sw $a2, 28($sp)\n"
+- "sw $a3, 32($sp)\n"
+- "sw $ra, 36($sp)\n"
+- "sw $t8, 40($sp)\n"
+- "sdc1 $f12, 48($sp)\n"
+- "sdc1 $f14, 56($sp)\n"
++ "sw $4, 20($29)\n"
++ "sw $5, 24($29)\n"
++ "sw $6, 28($29)\n"
++ "sw $7, 32($29)\n"
++ "sw $31, 36($29)\n"
++ "sw $24, 40($29)\n"
++ "sdc1 $f12, 48($29)\n"
++ "sdc1 $f14, 56($29)\n"
+
+ // t8 points at the end of function stub. Pass the beginning of the stub
+ // to the MipsCompilationCallbackC.
+- "addiu $a0, $t8, -16\n"
++ "addiu $4, $24, -16\n"
+ "jal " ASMPREFIX "MipsCompilationCallbackC\n"
+ "nop\n"
+
+ // Restore registers.
+- "lw $a0, 20($sp)\n"
+- "lw $a1, 24($sp)\n"
+- "lw $a2, 28($sp)\n"
+- "lw $a3, 32($sp)\n"
+- "lw $ra, 36($sp)\n"
+- "lw $t8, 40($sp)\n"
+- "ldc1 $f12, 48($sp)\n"
+- "ldc1 $f14, 56($sp)\n"
+- "addiu $sp, $sp, 64\n"
++ "lw $4, 20($29)\n"
++ "lw $5, 24($29)\n"
++ "lw $6, 28($29)\n"
++ "lw $7, 32($29)\n"
++ "lw $31, 36($29)\n"
++ "lw $24, 40($29)\n"
++ "ldc1 $f12, 48($29)\n"
++ "ldc1 $f14, 56($29)\n"
++ "addiu $29, $29, 64\n"
+
+ // Jump to the (newly modified) stub to invoke the real function.
+- "addiu $t8, $t8, -16\n"
+- "jr $t8\n"
++ "addiu $24, $24, -16\n"
++ "jr $24\n"
+ "nop\n"
+
+ ".set reorder\n"
