This requires the riscv-elf/binutils diff for -shared.

Tested with
qemu-system-riscv64 -M virt 
-bios opensbi/generic/fw_jump.bin
-kernel u-boot/qemu-riscv64_smode/u-boot.bin

Index: Makefile
===================================================================
RCS file: /cvs/ports/sysutils/u-boot/Makefile,v
retrieving revision 1.82
diff -u -p -r1.82 Makefile
--- Makefile    23 Apr 2021 23:56:11 -0000      1.82
+++ Makefile    27 Apr 2021 10:16:51 -0000
@@ -3,7 +3,7 @@
 BROKEN-sparc64=        Error: the specified option is not accepted in ISB at 
operand 1 -- isb sy
 BROKEN-arm=    lib/time.c:187:1: internal compiler error: Bus error
 
-FLAVORS=       aarch64 arm
+FLAVORS=       aarch64 arm riscv64
 FLAVOR?=       arm
 
 COMMENT=       U-Boot firmware
@@ -47,6 +47,9 @@ SUNXI_BL31=   "${LOCALBASE}/share/arm-trus
 .elif "${FLAVOR}" == "arm"
 BUILD_DEPENDS+=        devel/arm-none-eabi/gcc-linaro>=7.4.2019.02
 MAKE_ENV+=     CROSS_COMPILE="arm-none-eabi-"
+.elif "${FLAVOR}" == "riscv64"
+BUILD_DEPENDS+= devel/riscv-elf/gcc
+MAKE_ENV+=     CROSS_COMPILE="riscv64-unknown-elf-"
 .endif
 
 USE_GMAKE=     Yes
@@ -139,6 +142,9 @@ BOARDS=\
        tinker-rk3288 \
        turris_omnia \
        vexpress_ca15_tc2
+.elif "${FLAVOR}" == "riscv64"
+BOARDS=\
+       qemu-riscv64_smode
 .endif
 
 FILES=\
Index: pkg/PFRAG.riscv64
===================================================================
RCS file: pkg/PFRAG.riscv64
diff -N pkg/PFRAG.riscv64
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ pkg/PFRAG.riscv64   27 Apr 2021 10:16:51 -0000
@@ -0,0 +1,5 @@
+@comment $OpenBSD$
+share/u-boot/
+share/u-boot/qemu-riscv64_smode/
+share/u-boot/qemu-riscv64_smode/u-boot
+share/u-boot/qemu-riscv64_smode/u-boot.bin
Index: pkg/PLIST
===================================================================
RCS file: /cvs/ports/sysutils/u-boot/pkg/PLIST,v
retrieving revision 1.5
diff -u -p -r1.5 PLIST
--- pkg/PLIST   11 Dec 2016 14:08:39 -0000      1.5
+++ pkg/PLIST   27 Apr 2021 10:16:51 -0000
@@ -1,3 +1,4 @@
 @comment $OpenBSD: PLIST,v 1.5 2016/12/11 14:08:39 patrick Exp $
 %%aarch64%%
 %%arm%%
+%%riscv64%%

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