From: Dinh Nguyen <dingu...@kernel.org> Date: Wed, 5 Jun 2019 10:05:50 -0500
> Add the "altr,socfpga-stmmac-a10-s10" binding for Arria10/Agilex/Stratix10 > implementation of the stmmac ethernet controller. > > On the Arria10, Agilex, and Stratix10 SoCs, there are a few differences from > the Cyclone5 and Arria5: > - The emac PHY setup bits are in separate registers. > - The PTP reference clock select mask is different. > - The register to enable the emac signal from FPGA is different. > > Because of these differences, the dwmac-socfpga glue logic driver will > use this new binding to set the appropriate bits for PHY, PTP reference > clock, and signal from FPGA. > > Signed-off-by: Dinh Nguyen <dingu...@kernel.org> Applied to net-next.
