On Mon, Jun 03, 2019 at 03:57:07PM -0600, Robert Hancock wrote: > The Xilinx DMA blocks each have their own reset register, but they both > reset the entire DMA engine, so only one of them needs to be reset. > > Also, when stopping the device, we need to not just command the DMA > blocks to stop, but wait for them to stop, and trigger a device reset > to ensure that they are completely stopped.
Given the previous patch, does this device reset also need to take the
MDIO bus into account?
Andrew
