On Mon, 3 Jun 2019 17:12:04 -0600 Robert Hancock <hanc...@sedsystems.ca> wrote:
> This adds a driver for the PHY device implemented in the Xilinx PCS/PMA > Core logic. This is mostly a generic gigabit PHY, except that the > features are explicitly set because the PHY wrongly indicates it has no > extended status register when it actually does. > > This version is a simplified version of the GPL 2+ version from the > Xilinx kernel tree. > > Signed-off-by: Robert Hancock <hanc...@sedsystems.ca> > --- > > Differences from v1: > -Removed unnecessary config_init method > -Added comment to explain why features are explicitly set > > drivers/net/phy/Kconfig | 6 ++++++ > drivers/net/phy/Makefile | 1 + > drivers/net/phy/xilinx.c | 51 > ++++++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 58 insertions(+) > create mode 100644 drivers/net/phy/xilinx.c > Seems fine. Reviewed-by: Jesse Brandeburg <jesse.brandeb...@intel.com>
