Hi Tristram, Thank you for the patch! Yet something to improve:
[auto build test ERROR on net-next/master] url: https://github.com/0day-ci/linux/commits/Tristram-Ha-microchip-com/net-dsa-microchip-add-KSZ9893-switch-support/20190227-141333 config: i386-randconfig-x009-201908 (attached as .config) compiler: gcc-8 (Debian 8.2.0-20) 8.2.0 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): drivers/net/dsa/microchip/ksz9477.c: In function 'ksz9477_switch_detect': >> drivers/net/dsa/microchip/ksz9477.c:1516:8: error: implicit declaration of >> function 'of_modalias_node'; did you mean 'of_match_node'? >> [-Werror=implicit-function-declaration] if (!of_modalias_node(dev->dev->of_node, name, sizeof(name))) { ^~~~~~~~~~~~~~~~ of_match_node cc1: some warnings being treated as errors vim +1516 drivers/net/dsa/microchip/ksz9477.c 1433 1434 static int ksz9477_switch_detect(struct ksz_device *dev) 1435 { 1436 int chip = -1; 1437 u8 data8; 1438 u8 id_hi; 1439 u8 id_lo; 1440 u32 id32; 1441 int ret; 1442 1443 /* turn off SPI DO Edge select */ 1444 ret = ksz_read8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, &data8); 1445 if (ret) 1446 return ret; 1447 1448 data8 &= ~SPI_AUTO_EDGE_DETECTION; 1449 ret = ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8); 1450 if (ret) 1451 return ret; 1452 1453 /* read chip id */ 1454 ret = ksz_read32(dev, REG_CHIP_ID0__1, &id32); 1455 if (ret) 1456 return ret; 1457 ret = ksz_read8(dev, REG_GLOBAL_OPTIONS, &data8); 1458 if (ret) 1459 return ret; 1460 1461 /* Number of ports can be reduced depending on chip. */ 1462 dev->mib_port_cnt = TOTAL_PORT_NUM; 1463 dev->phy_port_cnt = 5; 1464 1465 /* Default capability is gigabit capable. */ 1466 dev->features = GBIT_SUPPORT; 1467 1468 id_hi = (u8)(id32 >> 16); 1469 id_lo = (u8)(id32 >> 8); 1470 if ((id_lo & 0xf) == 3) { 1471 /* Chip is from KSZ9893 design. */ 1472 dev->features |= IS_9893; 1473 1474 /* Chip does not support gigabit. */ 1475 if (data8 & SW_QW_ABLE) 1476 dev->features &= ~GBIT_SUPPORT; 1477 dev->mib_port_cnt = 3; 1478 dev->phy_port_cnt = 2; 1479 if (!(data8 & SW_AVB_ABLE)) 1480 chip = KSZ9893_SW_CHIP; 1481 else if (data8 & SW_QW_ABLE) 1482 chip = KSZ8563_SW_CHIP; 1483 else 1484 chip = KSZ9563_SW_CHIP; 1485 } else { 1486 /* Chip uses new XMII register definitions. */ 1487 dev->features |= NEW_XMII; 1488 1489 /* Chip does not support gigabit. */ 1490 if (!(data8 & SW_GIGABIT_ABLE)) 1491 dev->features &= ~GBIT_SUPPORT; 1492 if ((id_lo & 0xf) == 6) 1493 dev->mib_port_cnt = 6; 1494 if (id_hi == FAMILY_ID_94) 1495 chip = KSZ9477_SW_CHIP; 1496 else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_97) 1497 chip = KSZ9897_SW_CHIP; 1498 else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_96) 1499 chip = KSZ9896_SW_CHIP; 1500 else if (id_hi == FAMILY_ID_95 && id_lo == CHIP_ID_67) 1501 chip = KSZ9567_SW_CHIP; 1502 else if (id_hi == FAMILY_ID_85 && id_lo == CHIP_ID_67) 1503 chip = KSZ8567_SW_CHIP; 1504 if (id_lo == CHIP_ID_67) { 1505 id_hi = FAMILY_ID_98; 1506 id_lo = CHIP_ID_97; 1507 } else if (id_lo == CHIP_ID_66) { 1508 id_hi = FAMILY_ID_98; 1509 id_lo = CHIP_ID_96; 1510 } 1511 } 1512 if (dev->dev->of_node) { 1513 char name[80]; 1514 1515 /* KSZ8565 chip can only be set through device tree. */ > 1516 if (!of_modalias_node(dev->dev->of_node, name, > sizeof(name))) { 1517 if (!strcmp(name, "ksz8565")) { 1518 chip = KSZ8565_SW_CHIP; 1519 id_hi = FAMILY_ID_98; 1520 id_lo = 0x95; 1521 } 1522 } 1523 } 1524 1525 /* Change chip id to known ones so it can be matched against them. */ 1526 id32 = (id_hi << 16) | (id_lo << 8); 1527 1528 dev->chip_id = id32; 1529 1530 /* Update switch device name to matched chip. */ 1531 if (chip >= 0) 1532 dev->name = ksz9477_chip_names[chip]; 1533 1534 return 0; 1535 } 1536 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
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