On Tue, Dec 12, 2017 at 10:45:21PM +0530, [email protected] wrote:
> From: Jassi Brar <[email protected]>
>
> This patch adds documentation for Device-Tree bindings for the
> Socionext NetSec Controller driver.
>
> Signed-off-by: Ard Biesheuvel <[email protected]>
> Signed-off-by: Jassi Brar <[email protected]>
> ---
> .../devicetree/bindings/net/socionext-netsec.txt | 43
> ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/socionext-netsec.txt
>
> diff --git a/Documentation/devicetree/bindings/net/socionext-netsec.txt
> b/Documentation/devicetree/bindings/net/socionext-netsec.txt
> new file mode 100644
> index 0000000..4695969
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/socionext-netsec.txt
> @@ -0,0 +1,45 @@
> +* Socionext NetSec Ethernet Controller IP
> +
> +Required properties:
> +- compatible: Should be "socionext,synquacer-netsec"
> +- reg: Address and length of the control register area, followed by the
> + address and length of the EEPROM holding the MAC address and
> + microengine firmware
> +- interrupts: Should contain ethernet controller interrupt
> +- clocks: phandle to the PHY reference clock, and any other clocks to be
> + switched by runtime_pm
> +- clock-names: Required only if more than a single clock is listed in
> 'clocks'.
> + The PHY reference clock must be named 'phy_refclk'
> +- phy-mode: See ethernet.txt file in the same directory
> +- phy-handle: phandle to select child phy
> +
> +Optional properties: (See ethernet.txt file in the same directory)
> +- dma-coherent: Boolean property, must only be present if memory
> + accesses performed by the device are cache coherent
> +- local-mac-address
> +- mac-address
> +- max-speed
> +- max-frame-size
> +
> +Required properties for the child phy:
> +- reg: phy address
Hi Jassi
Just reference phy.txt
> +
> +Example:
> + eth0: netsec@522D0000 {
> + compatible = "socionext,synquacer-netsec";
> + reg = <0 0x522D0000 0x0 0x10000>, <0 0x10000000 0x0 0x10000>;
> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk_netsec>;
> + phy-mode = "rgmii";
> + max-speed = <1000>;
> + max-frame-size = <9000>;
> + phy-handle = <ðphy0>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
Please add an mdio node here, and list all the phys and possibly
Ethernet switches as children of it.
Andrew
