On 11/01/2017 06:09 PM, Florian Fainelli wrote:
On 11/01/2017 05:36 PM, David Daney wrote:
From: Carlos Munoz <cmu...@cavium.com>
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz <cmu...@cavium.com>
Signed-off-by: Steven J. Hill <steven.h...@cavium.com>
Signed-off-by: David Daney <david.da...@cavium.com>
---
[snip]
+Properties:
+
+- compatible: "cavium,octeon-7360-xcv": Compatibility with cn73xx SOCs.
+
+- reg: The index of the interface within the BGX block.
+
+- local-mac-address: Mac address for the interface.
+
+- phy-handle: phandle to the phy node connected to the interface.
+
+- cavium,rx-clk-delay-bypass: Set to <1> to bypass the rx clock delay setting.
+ Needed by the Micrel PHY.
Is not that implied by an appropriate "phy-mode" property already?
I think you are correct. That string never appears in the source code,
so I am going to remove that property from the binding document for the
next revision of the patch set.
Thanks,
David Daney
