On 11/01/2017 05:36 PM, David Daney wrote: > From: Carlos Munoz <[email protected]> > > Add bindings for Common Ethernet Interface (BGX) block. > > Signed-off-by: Carlos Munoz <[email protected]> > Signed-off-by: Steven J. Hill <[email protected]> > Signed-off-by: David Daney <[email protected]> > --- [snip] > +Properties: > + > +- compatible: "cavium,octeon-7360-xcv": Compatibility with cn73xx SOCs. > + > +- reg: The index of the interface within the BGX block. > + > +- local-mac-address: Mac address for the interface. > + > +- phy-handle: phandle to the phy node connected to the interface. > + > +- cavium,rx-clk-delay-bypass: Set to <1> to bypass the rx clock delay > setting. > + Needed by the Micrel PHY.
Is not that implied by an appropriate "phy-mode" property already? -- Florian
