> -----Original Message----- > From: David Laight [mailto:david.lai...@aculab.com] > Sent: Friday, March 3, 2017 4:25 AM > To: Kirsher, Jeffrey T <jeffrey.t.kirs...@intel.com>; da...@davemloft.net > Cc: Duyck, Alexander H <alexander.h.du...@intel.com>; > netdev@vger.kernel.org; nhor...@redhat.com; sassm...@redhat.com; > jogre...@redhat.com > Subject: RE: [net 2/2] ixgbe: Limit use of 2K buffers on architectures with > 256B > or larger cache lines > > From: Jeff Kirsher > > Sent: 03 March 2017 02:25 > > From: Alexander Duyck <alexander.h.du...@intel.com> > > > > On architectures that have a cache line size larger than 64 Bytes we > > start running into issues where the amount of headroom for the frame > > starts shrinking. > > > > The size of skb_shared_info on a system with a 64B L1 cache line size > > is 320. This increases to 384 with a 128B cache line, and 512 with a > > 256B cache line. > > Perhaps some of the CACHE_LINE_ALIGNED markers don't actually need to > force alignment with large line sizes? > > I realise some things have hard requirements for cache alignment (eg non- > coherent dma), but others are just there to limit the number of cache lines > read > and/or dirtied. > > David
For our purposes I think this works well enough. Basically we wanted to guarantee we have enough headroom for XDP. In the case of the Mellanox drivers they are guaranteeing 256 if I recall correctly. I have some follow-up patches for net-next that will make it so that we can just do a build-time test that will determine the padding size and allow us to always guaranteed at least NET_SKB_PAD + NET_IP_ALIGN. - Alex
