Why would this not work for dvec3? That is 6 elements, the intention when writing this code was to do a 4 32-bit component store (hence count=4), and then a 2 32-bit component store afterwards. The only reason this apparently fails now is because we update the writemask wrong here (intepret it as 64-bit components, but write it with 32-bit components).
On Wed, Jan 17, 2018 at 10:47 AM, Timothy Arceri <[email protected]> wrote: > Reseting to 4 would have only worked for dvec4, subtracting 4 > from the original count will instead give us 6 when working with a > dvec3. > --- > src/amd/common/ac_nir_to_llvm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c > index c24e563695..bb4f90b3a0 100644 > --- a/src/amd/common/ac_nir_to_llvm.c > +++ b/src/amd/common/ac_nir_to_llvm.c > @@ -2452,7 +2452,7 @@ static void visit_store_ssbo(struct ac_nir_context *ctx, > > if (count > 4) { > writemask |= ((1u << (count - 4)) - 1u) << (start + > 4); > - count = 4; > + count -= 4; > elem_size_mul = 1; > } > > -- > 2.14.3 > > _______________________________________________ > mesa-dev mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
