On Thu, Jul 6, 2017 at 8:12 PM, Alex Deucher <alexdeuc...@gmail.com> wrote: > On Thu, Jul 6, 2017 at 1:13 PM, Jan Vesely <jan.ves...@rutgers.edu> wrote: >> On Thu, 2017-07-06 at 12:09 +1000, Dave Airlie wrote: >>> From: Dave Airlie <airl...@redhat.com> >>> >>> Use family, but only set xnack+ for gfx9. >>> >>> Signed-off-by: Dave Airlie <airl...@redhat.com> >>> --- >>> src/amd/common/ac_llvm_util.c | 4 +++- >>> 1 file changed, 3 insertions(+), 1 deletion(-) >>> >>> diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c >>> index 4f32d4b..84ed73f 100644 >>> --- a/src/amd/common/ac_llvm_util.c >>> +++ b/src/amd/common/ac_llvm_util.c >>> @@ -126,7 +126,9 @@ LLVMTargetMachineRef ac_create_target_machine(enum >>> radeon_family family, enum ac >>> LLVMTargetRef target = ac_get_llvm_target(triple); >>> >>> snprintf(features, sizeof(features), >>> - "+DumpCode,+vgpr-spilling,-fp32-denormals,-xnack"); >>> + "+DumpCode,+vgpr-spilling,-fp32-denormals%s", >>> + family >= CHIP_VEGA10 ? ",+xnack" : ",-xnack"); >> >> isn't xnack also supported on carrizo? > > Only on memory mapped via ATC which we only use with ROCm at the moment.
xnack is currently enabled on all compute rings on Carrizo and Stoney. ATC or not, can the hw update the xnack SGPR pair? If yes, the compiler should reserve it to make sure the registers aren't used as general purpose registers. With current LLVM, the following applies: If you use a compute ring, use the default LLVM setting. If not, set -xnack. Marek _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
