From: Hi-Angel <hi-an...@yandex.ru>
It's actually iterating through channels, checking whether they're
enabled
Signed-off-by: Constantine Charlamov <hi-an...@yandex.ru>
---
src/gallium/drivers/r600/r600_shader.c | 56 +++++++++++++++++-----------------
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 905214f69b..972e013aef 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -377,7 +377,7 @@ static void r600_bytecode_src(struct r600_bytecode_alu_src
*bc_src,
static int do_lds_fetch_values(struct r600_shader_ctx *ctx, unsigned temp_reg,
unsigned dst_reg);
-static int tgsi_last_instruction(unsigned writemask)
+static int tgsi_last_channel(unsigned writemask)
{
int i, last_ch = 0;
@@ -2692,7 +2692,7 @@ static int r600_store_tcs_output(struct r600_shader_ctx
*ctx)
return r;
/* LDS write */
- lasti = tgsi_last_instruction(write_mask);
+ lasti = tgsi_last_channel(write_mask);
for (chan_index = 1; chan_index <= lasti; chan_index++) {
if(!TGSI_IS_DST0_CHANNEL_ENABLED(inst, chan_index))
continue;
@@ -3766,7 +3766,7 @@ static int tgsi_op2_64_params(struct r600_shader_ctx
*ctx, bool singledest, bool
}
}
- lasti = tgsi_last_instruction(write_mask);
+ lasti = tgsi_last_channel(write_mask);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -3893,7 +3893,7 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int
swap, int trans_only)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
- int chan_index, j, r, lasti = tgsi_last_instruction(write_mask);
+ int chan_index, j, r, lasti = tgsi_last_channel(write_mask);
/* use temp register if trans_only and more than one dst component */
int use_tmp = trans_only && (write_mask ^ (1 << lasti));
unsigned op = ctx->inst_info->op;
@@ -3966,7 +3966,7 @@ static int tgsi_ineg(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -3994,7 +3994,7 @@ static int tgsi_dneg(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -4084,7 +4084,7 @@ static int egcm_int_to_double(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
assert(inst->Instruction.Opcode == TGSI_OPCODE_I2D ||
inst->Instruction.Opcode == TGSI_OPCODE_U2D);
@@ -4131,7 +4131,7 @@ static int egcm_double_to_int(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
assert(inst->Instruction.Opcode == TGSI_OPCODE_D2I ||
inst->Instruction.Opcode == TGSI_OPCODE_D2U);
@@ -4208,7 +4208,7 @@ static int cayman_emit_double_instr(struct
r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
int chan_index, r;
struct r600_bytecode_alu alu;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
int t1 = ctx->temp_reg;
/* should only be one src regs */
@@ -4277,7 +4277,7 @@ static int cayman_mul_int_instr(struct r600_shader_ctx
*ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
int chan_index, j, k, r;
struct r600_bytecode_alu alu;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
int t1 = ctx->temp_reg;
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, k) {
@@ -4321,7 +4321,7 @@ static int cayman_mul_double_instr(struct r600_shader_ctx
*ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
int chan_index, j, k, r;
struct r600_bytecode_alu alu;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
int t1 = ctx->temp_reg;
/* t1 would get overwritten below if we actually tried to
@@ -4533,7 +4533,7 @@ static int tgsi_trig(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
r = tgsi_setup_trig(ctx);
if (r)
@@ -5904,7 +5904,7 @@ static int tgsi_f2i(struct r600_shader_ctx *ctx)
struct r600_bytecode_alu alu;
int chan_index, r;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
- int last_inst = tgsi_last_instruction(write_mask);
+ int last_inst = tgsi_last_channel(write_mask);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -5947,7 +5947,7 @@ static int tgsi_iabs(struct r600_shader_ctx *ctx)
struct r600_bytecode_alu alu;
int chan_index, r;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
- int last_inst = tgsi_last_instruction(write_mask);
+ int last_inst = tgsi_last_channel(write_mask);
/* tmp = -src */
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
@@ -5997,7 +5997,7 @@ static int tgsi_issg(struct r600_shader_ctx *ctx)
struct r600_bytecode_alu alu;
int chan_index, r;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
- int last_inst = tgsi_last_instruction(write_mask);
+ int last_inst = tgsi_last_channel(write_mask);
/* tmp = (src >= 0 ? src : -1) */
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
@@ -6107,7 +6107,7 @@ static int tgsi_bfi(struct r600_shader_ctx *ctx)
int chan_index, r, t1, t2;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
- int last_inst = tgsi_last_instruction(write_mask);
+ int last_inst = tgsi_last_channel(write_mask);
t1 = ctx->temp_reg;
@@ -6178,7 +6178,7 @@ static int tgsi_msb(struct r600_shader_ctx *ctx)
int chan_index, r, t1, t2;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
- int last_inst = tgsi_last_instruction(write_mask);
+ int last_inst = tgsi_last_channel(write_mask);
assert(ctx->inst_info->op == ALU_OP1_FFBH_INT ||
ctx->inst_info->op == ALU_OP1_FFBH_UINT);
@@ -6392,7 +6392,7 @@ static int tgsi_interp_egcm(struct r600_shader_ctx *ctx)
}
// INTERP can't swizzle dst
- lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, i) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
@@ -6473,7 +6473,7 @@ static int tgsi_op3(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, j, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
int temp_regs[4];
unsigned op = ctx->inst_info->op;
@@ -6627,7 +6627,7 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx *ctx,
boolean src_requires_l
return 0;
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
- int lasti =
tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_AND_INT;
@@ -7589,7 +7589,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
unsigned chan_index, temp_regs[2];
int r;
@@ -7690,7 +7690,7 @@ static int tgsi_cmp(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, r, j;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
int temp_regs[3];
unsigned op;
@@ -7738,7 +7738,7 @@ static int tgsi_ucmp(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -8225,7 +8225,7 @@ static int tgsi_eg_arl(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r;
- int chan_index, lasti =
tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int chan_index, lasti =
tgsi_last_channel(inst->Dst[0].Register.WriteMask);
unsigned reg = get_address_file_reg(ctx, inst->Dst[0].Register.Index);
assert(inst->Dst[0].Register.Index < 3);
@@ -8269,7 +8269,7 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r;
- int chan_index, lasti =
tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int chan_index, lasti =
tgsi_last_channel(inst->Dst[0].Register.WriteMask);
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ARL:
@@ -8795,7 +8795,7 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int chan_index, j, k, r;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
/* src0 * src1 */
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
@@ -8861,7 +8861,7 @@ static int tgsi_pk2h(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r, chan_index;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
/* temp.xy = f32_to_f16(src) */
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -8906,7 +8906,7 @@ static int tgsi_up2h(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r, chan_index;
- int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int lasti = tgsi_last_channel(inst->Dst[0].Register.WriteMask);
/* temp.x = src.x */
/* note: no need to mask out the high bits */
--
2.11.1
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