From: Hi-Angel <hi-an...@yandex.ru>
I might have missed some more opportunities to rename, but oh well.
Signed-off-by: Constantine Charlamov <hi-an...@yandex.ru>
---
src/gallium/drivers/r600/r600_shader.c | 590 ++++++++++++++++-----------------
1 file changed, 295 insertions(+), 295 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 46aa2c1abd..8562678d0c 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2672,7 +2672,7 @@ static int r600_store_tcs_output(struct r600_shader_ctx
*ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
const struct tgsi_full_dst_register *dst = &inst->Dst[0];
- int i, r, lasti;
+ int chan_index, r, lasti;
int temp_reg = r600_get_temp(ctx);
struct r600_bytecode_alu alu;
unsigned write_mask = dst->Register.WriteMask;
@@ -2692,36 +2692,36 @@ static int r600_store_tcs_output(struct r600_shader_ctx
*ctx)
/* LDS write */
lasti = tgsi_last_instruction(write_mask);
- for (i = 1; i <= lasti; i++) {
+ for (chan_index = 1; chan_index <= lasti; chan_index++) {
- if (!(write_mask & (1 << i)))
+ if (!(write_mask & (1 << chan_index)))
continue;
r = single_alu_op2(ctx, ALU_OP2_ADD_INT,
- temp_reg, i,
+ temp_reg, chan_index,
temp_reg, 0,
- V_SQ_ALU_SRC_LITERAL, 4 * i);
+ V_SQ_ALU_SRC_LITERAL, 4 * chan_index);
if (r)
return r;
}
- for (i = 0; i <= lasti; i++) {
- if (!(write_mask & (1 << i)))
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
+ if (!(write_mask & (1 << chan_index)))
continue;
- if ((i == 0 && ((write_mask & 3) == 3)) ||
- (i == 2 && ((write_mask & 0xc) == 0xc))) {
+ if ((chan_index == 0 && ((write_mask & 3) == 3)) ||
+ (chan_index == 2 && ((write_mask & 0xc) == 0xc))) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = LDS_OP3_LDS_WRITE_REL;
alu.src[0].sel = temp_reg;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
alu.src[1].sel = dst->Register.Index;
alu.src[1].sel += ctx->file_offset[dst->Register.File];
- alu.src[1].chan = i;
+ alu.src[1].chan = chan_index;
alu.src[2].sel = dst->Register.Index;
alu.src[2].sel += ctx->file_offset[dst->Register.File];
- alu.src[2].chan = i + 1;
+ alu.src[2].chan = chan_index + 1;
alu.lds_idx = 1;
alu.dst.chan = 0;
alu.last = 1;
@@ -2729,17 +2729,17 @@ static int r600_store_tcs_output(struct r600_shader_ctx
*ctx)
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
- i += 1;
+ chan_index += 1;
continue;
}
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = LDS_OP2_LDS_WRITE;
alu.src[0].sel = temp_reg;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
alu.src[1].sel = dst->Register.Index;
alu.src[1].sel += ctx->file_offset[dst->Register.File];
- alu.src[1].chan = i;
+ alu.src[1].chan = chan_index;
alu.src[2].sel = V_SQ_ALU_SRC_0;
alu.dst.chan = 0;
@@ -3747,7 +3747,7 @@ static int tgsi_op2_64_params(struct r600_shader_ctx
*ctx, bool singledest, bool
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
struct r600_bytecode_alu alu;
- int i, j, r, lasti = tgsi_last_instruction(write_mask);
+ int chan_index, j, r, lasti = tgsi_last_instruction(write_mask);
int use_tmp = 0;
if (singledest) {
@@ -3770,39 +3770,39 @@ static int tgsi_op2_64_params(struct r600_shader_ctx
*ctx, bool singledest, bool
}
lasti = tgsi_last_instruction(write_mask);
- for (i = 0; i <= lasti; i++) {
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
- if (!(write_mask & (1 << i)))
+ if (!(write_mask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
if (singledest) {
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
if (use_tmp) {
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
}
- if (i == 1 || i == 3)
+ if (chan_index == 1 || chan_index == 3)
alu.dst.write = 0;
} else
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.op = ctx->inst_info->op;
if (ctx->parse.FullToken.FullInstruction.Instruction.Opcode ==
TGSI_OPCODE_DABS) {
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0],
chan_index);
} else if (!swap) {
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r600_bytecode_src(&alu.src[j], &ctx->src[j],
fp64_switch(i));
+ r600_bytecode_src(&alu.src[j], &ctx->src[j],
fp64_switch(chan_index));
}
} else {
- r600_bytecode_src(&alu.src[0], &ctx->src[1],
fp64_switch(i));
- r600_bytecode_src(&alu.src[1], &ctx->src[0],
fp64_switch(i));
+ r600_bytecode_src(&alu.src[0], &ctx->src[1],
fp64_switch(chan_index));
+ r600_bytecode_src(&alu.src[1], &ctx->src[0],
fp64_switch(chan_index));
}
/* handle some special cases */
- if (i == 1 || i == 3) {
+ if (chan_index == 1 || chan_index == 3) {
switch
(ctx->parse.FullToken.FullInstruction.Instruction.Opcode) {
case TGSI_OPCODE_DABS:
r600_bytecode_src_set_abs(&alu.src[0]);
@@ -3811,7 +3811,7 @@ static int tgsi_op2_64_params(struct r600_shader_ctx
*ctx, bool singledest, bool
break;
}
}
- if (i == lasti) {
+ if (chan_index == lasti) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -3823,16 +3823,16 @@ static int tgsi_op2_64_params(struct r600_shader_ctx
*ctx, bool singledest, bool
write_mask = inst->Dst[0].Register.WriteMask;
/* move result from temp to dst */
- for (i = 0; i <= lasti; i++) {
- if (!(write_mask & (1 << i)))
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
+ if (!(write_mask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = use_tmp - 1;
- alu.last = (i == lasti);
+ alu.last = (chan_index == lasti);
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -3903,7 +3903,7 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int
swap, int trans_only)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
- int i, j, r, lasti = tgsi_last_instruction(write_mask);
+ int chan_index, j, r, lasti = tgsi_last_instruction(write_mask);
/* use temp register if trans_only and more than one dst component */
int use_tmp = trans_only && (write_mask ^ (1 << lasti));
unsigned op = ctx->inst_info->op;
@@ -3912,28 +3912,28 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int
swap, int trans_only)
ctx->info.properties[TGSI_PROPERTY_MUL_ZERO_WINS])
op = ALU_OP2_MUL;
- for (i = 0; i <= lasti; i++) {
- if (!(write_mask & (1 << i)))
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
+ if (!(write_mask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
if (use_tmp) {
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
} else
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.op = op;
if (!swap) {
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r600_bytecode_src(&alu.src[j], &ctx->src[j], i);
+ r600_bytecode_src(&alu.src[j], &ctx->src[j],
chan_index);
}
} else {
- r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
- r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[1],
chan_index);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0],
chan_index);
}
- if (i == lasti || trans_only) {
+ if (chan_index == lasti || trans_only) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -3943,16 +3943,16 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int
swap, int trans_only)
if (use_tmp) {
/* move result from temp to dst */
- for (i = 0; i <= lasti; i++) {
- if (!(write_mask & (1 << i)))
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
+ if (!(write_mask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = i;
- alu.last = (i == lasti);
+ alu.src[0].chan = chan_index;
+ alu.last = (chan_index == lasti);
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -3981,23 +3981,23 @@ static int tgsi_ineg(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
- for (i = 0; i < lasti + 1; i++) {
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
alu.src[0].sel = V_SQ_ALU_SRC_0;
- r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], chan_index);
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
- if (i == lasti) {
+ if (chan_index == lasti) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -4012,23 +4012,23 @@ static int tgsi_dneg(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
- for (i = 0; i < lasti + 1; i++) {
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
- if (i == 1 || i == 3)
+ if (chan_index == 1 || chan_index == 3)
r600_bytecode_src_toggle_neg(&alu.src[0]);
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
- if (i == lasti) {
+ if (chan_index == lasti) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -4105,19 +4105,19 @@ static int egcm_int_to_double(struct r600_shader_ctx
*ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
assert(inst->Instruction.Opcode == TGSI_OPCODE_I2D ||
inst->Instruction.Opcode == TGSI_OPCODE_U2D);
- for (i = 0; i <= (lasti+1)/2; i++) {
+ for (chan_index = 0; chan_index <= (lasti+1)/2; chan_index++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
alu.last = 1;
@@ -4126,19 +4126,19 @@ static int egcm_int_to_double(struct r600_shader_ctx
*ctx)
return r;
}
- for (i = 0; i <= lasti; i++) {
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_FLT32_TO_FLT64;
- alu.src[0].chan = i/2;
- if (i%2 == 0)
+ alu.src[0].chan = chan_index/2;
+ if (chan_index%2 == 0)
alu.src[0].sel = ctx->temp_reg;
else {
alu.src[0].sel = V_SQ_ALU_SRC_LITERAL;
alu.src[0].value = 0x0;
}
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.last = i == lasti;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.last = chan_index == lasti;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -4152,32 +4152,32 @@ static int egcm_double_to_int(struct r600_shader_ctx
*ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
assert(inst->Instruction.Opcode == TGSI_OPCODE_D2I ||
inst->Instruction.Opcode == TGSI_OPCODE_D2U);
- for (i = 0; i <= lasti; i++) {
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_FLT64_TO_FLT32;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], fp64_switch(i));
- alu.dst.chan = i;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0],
fp64_switch(chan_index));
+ alu.dst.chan = chan_index;
alu.dst.sel = ctx->temp_reg;
- alu.dst.write = i%2 == 0;
- alu.last = i == lasti;
+ alu.dst.write = chan_index%2 == 0;
+ alu.last = chan_index == lasti;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- for (i = 0; i <= (lasti+1)/2; i++) {
+ for (chan_index = 0; chan_index <= (lasti+1)/2; chan_index++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
- alu.src[0].chan = i*2;
+ alu.src[0].chan = chan_index*2;
alu.src[0].sel = ctx->temp_reg;
tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
alu.last = 1;
@@ -4228,7 +4228,7 @@ static int cayman_emit_unary_double_raw(struct
r600_bytecode *bc,
static int cayman_emit_double_instr(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
- int i, r;
+ int chan_index, r;
struct r600_bytecode_alu alu;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
int t1 = ctx->temp_reg;
@@ -4248,16 +4248,16 @@ static int cayman_emit_double_instr(struct
r600_shader_ctx *ctx)
if (r)
return r;
- for (i = 0 ; i <= lasti; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0 ; chan_index <= lasti; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
alu.src[0].sel = t1;
- alu.src[0].chan = (i == 0 || i == 2) ? 0 : 1;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.src[0].chan = (chan_index == 0 || chan_index == 2) ? 0 : 1;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.dst.write = 1;
- if (i == lasti)
+ if (chan_index == lasti)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -4299,7 +4299,7 @@ static int cayman_emit_float_instr(struct r600_shader_ctx
*ctx)
static int cayman_mul_int_instr(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
- int i, j, k, r;
+ int chan_index, j, k, r;
struct r600_bytecode_alu alu;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
int t1 = ctx->temp_reg;
@@ -4308,16 +4308,16 @@ static int cayman_mul_int_instr(struct r600_shader_ctx
*ctx)
if (!(inst->Dst[0].Register.WriteMask & (1 << k)))
continue;
- for (i = 0 ; i < 4; i++) {
+ for (chan_index = 0 ; chan_index < 4; chan_index++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
r600_bytecode_src(&alu.src[j], &ctx->src[j], k);
}
alu.dst.sel = t1;
- alu.dst.chan = i;
- alu.dst.write = (i == k);
- if (i == 3)
+ alu.dst.chan = chan_index;
+ alu.dst.write = (chan_index == k);
+ if (chan_index == 3)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -4325,16 +4325,16 @@ static int cayman_mul_int_instr(struct r600_shader_ctx
*ctx)
}
}
- for (i = 0 ; i <= lasti; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0 ; chan_index <= lasti; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
alu.src[0].sel = t1;
- alu.src[0].chan = i;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.src[0].chan = chan_index;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.dst.write = 1;
- if (i == lasti)
+ if (chan_index == lasti)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -4348,7 +4348,7 @@ static int cayman_mul_int_instr(struct r600_shader_ctx
*ctx)
static int cayman_mul_double_instr(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
- int i, j, k, r;
+ int chan_index, j, k, r;
struct r600_bytecode_alu alu;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
int t1 = ctx->temp_reg;
@@ -4360,32 +4360,32 @@ static int cayman_mul_double_instr(struct
r600_shader_ctx *ctx)
k = inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_XY ? 0 : 1;
- for (i = 0; i < 4; i++) {
+ for (chan_index = 0; chan_index < 4; chan_index++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r600_bytecode_src(&alu.src[j], &ctx->src[j], k * 2 +
((i == 3) ? 0 : 1));
+ r600_bytecode_src(&alu.src[j], &ctx->src[j], k * 2 +
((chan_index == 3) ? 0 : 1));
}
alu.dst.sel = t1;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- if (i == 3)
+ if (chan_index == 3)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- for (i = 0; i <= lasti; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index <= lasti; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
alu.src[0].sel = t1;
- alu.src[0].chan = i;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.src[0].chan = chan_index;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.dst.write = 1;
- if (i == lasti)
+ if (chan_index == lasti)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -4563,7 +4563,7 @@ static int tgsi_trig(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
r = tgsi_setup_trig(ctx);
@@ -4584,16 +4584,16 @@ static int tgsi_trig(struct r600_shader_ctx *ctx)
return r;
/* replicate result */
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
alu.src[0].sel = ctx->temp_reg;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- if (i == lasti)
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ if (chan_index == lasti)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -5936,42 +5936,42 @@ static int tgsi_f2i(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
int last_inst = tgsi_last_instruction(write_mask);
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_TRUNC;
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
- if (i == last_inst)
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
+ if (chan_index == last_inst)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
- if (i == last_inst || alu.op == ALU_OP1_FLT_TO_UINT)
+ if (chan_index == last_inst || alu.op == ALU_OP1_FLT_TO_UINT)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -5985,26 +5985,26 @@ static int tgsi_iabs(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
int last_inst = tgsi_last_instruction(write_mask);
/* tmp = -src */
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_SUB_INT;
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], chan_index);
alu.src[0].sel = V_SQ_ALU_SRC_0;
- if (i == last_inst)
+ if (chan_index == last_inst)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6012,8 +6012,8 @@ static int tgsi_iabs(struct r600_shader_ctx *ctx)
}
/* dst = (src >= 0 ? src : tmp) */
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -6021,14 +6021,14 @@ static int tgsi_iabs(struct r600_shader_ctx *ctx)
alu.is_op3 = 1;
alu.dst.write = 1;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
- r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], chan_index);
alu.src[2].sel = ctx->temp_reg;
- alu.src[2].chan = i;
+ alu.src[2].chan = chan_index;
- if (i == last_inst)
+ if (chan_index == last_inst)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6041,13 +6041,13 @@ static int tgsi_issg(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
int last_inst = tgsi_last_instruction(write_mask);
/* tmp = (src >= 0 ? src : -1) */
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -6055,14 +6055,14 @@ static int tgsi_issg(struct r600_shader_ctx *ctx)
alu.is_op3 = 1;
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
- r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], chan_index);
alu.src[2].sel = V_SQ_ALU_SRC_M_1_INT;
- if (i == last_inst)
+ if (chan_index == last_inst)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6070,8 +6070,8 @@ static int tgsi_issg(struct r600_shader_ctx *ctx)
}
/* dst = (tmp > 0 ? 1 : tmp) */
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -6079,17 +6079,17 @@ static int tgsi_issg(struct r600_shader_ctx *ctx)
alu.is_op3 = 1;
alu.dst.write = 1;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
alu.src[1].sel = V_SQ_ALU_SRC_1_INT;
alu.src[2].sel = ctx->temp_reg;
- alu.src[2].chan = i;
+ alu.src[2].chan = chan_index;
- if (i == last_inst)
+ if (chan_index == last_inst)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6156,27 +6156,27 @@ static int tgsi_bfi(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r, t1, t2;
+ int chan_index, r, t1, t2;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
int last_inst = tgsi_last_instruction(write_mask);
t1 = ctx->temp_reg;
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
/* create mask tmp */
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_BFM_INT;
alu.dst.sel = t1;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- alu.last = i == last_inst;
+ alu.last = chan_index == last_inst;
- r600_bytecode_src(&alu.src[0], &ctx->src[3], i);
- r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[3], chan_index);
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], chan_index);
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6185,44 +6185,44 @@ static int tgsi_bfi(struct r600_shader_ctx *ctx)
t2 = r600_get_temp(ctx);
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
/* shift insert left */
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_LSHL_INT;
alu.dst.sel = t2;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- alu.last = i == last_inst;
+ alu.last = chan_index == last_inst;
- r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
- r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], chan_index);
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], chan_index);
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
/* actual bitfield insert */
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP3_BFI_INT;
alu.is_op3 = 1;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.chan = i;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- alu.last = i == last_inst;
+ alu.last = chan_index == last_inst;
alu.src[0].sel = t1;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
alu.src[1].sel = t2;
- alu.src[1].chan = i;
- r600_bytecode_src(&alu.src[2], &ctx->src[0], i);
+ alu.src[1].chan = chan_index;
+ r600_bytecode_src(&alu.src[2], &ctx->src[0], chan_index);
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6236,7 +6236,7 @@ static int tgsi_msb(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r, t1, t2;
+ int chan_index, r, t1, t2;
unsigned write_mask = inst->Dst[0].Register.WriteMask;
int last_inst = tgsi_last_instruction(write_mask);
@@ -6247,19 +6247,19 @@ static int tgsi_msb(struct r600_shader_ctx *ctx)
t1 = ctx->temp_reg;
/* bit position is indexed from lsb by TGSI, and from msb by the
hardware */
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
/* t1 = FFBH_INT / FFBH_UINT */
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
alu.dst.sel = t1;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- alu.last = i == last_inst;
+ alu.last = chan_index == last_inst;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6268,47 +6268,47 @@ static int tgsi_msb(struct r600_shader_ctx *ctx)
t2 = r600_get_temp(ctx);
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
/* t2 = 31 - t1 */
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_SUB_INT;
alu.dst.sel = t2;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- alu.last = i == last_inst;
+ alu.last = chan_index == last_inst;
alu.src[0].sel = V_SQ_ALU_SRC_LITERAL;
alu.src[0].value = 31;
alu.src[1].sel = t1;
- alu.src[1].chan = i;
+ alu.src[1].chan = chan_index;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- for (i = 0; i < 4; i++) {
- if (!(write_mask & (1<<i)))
+ for (chan_index = 0; chan_index < 4; chan_index++) {
+ if (!(write_mask & (1<<chan_index)))
continue;
/* result = t1 >= 0 ? t2 : t1 */
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP3_CNDGE_INT;
alu.is_op3 = 1;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.chan = i;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
- alu.last = i == last_inst;
+ alu.last = chan_index == last_inst;
alu.src[0].sel = t1;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
alu.src[1].sel = t2;
- alu.src[1].chan = i;
+ alu.src[1].chan = chan_index;
alu.src[2].sel = t1;
- alu.src[2].chan = i;
+ alu.src[2].chan = chan_index;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -6545,7 +6545,7 @@ static int tgsi_op3(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, j, r;
+ int chan_index, j, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
int temp_regs[4];
unsigned op = ctx->inst_info->op;
@@ -6559,23 +6559,23 @@ static int tgsi_op3(struct r600_shader_ctx *ctx)
if (ctx->src[j].abs)
temp_regs[j] = r600_get_temp(ctx);
}
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = op;
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r = tgsi_make_src_for_op3(ctx, temp_regs[j], i,
&alu.src[j], &ctx->src[j]);
+ r = tgsi_make_src_for_op3(ctx, temp_regs[j],
chan_index, &alu.src[j], &ctx->src[j]);
if (r)
return r;
}
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.chan = i;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
alu.is_op3 = 1;
- if (i == lasti) {
+ if (chan_index == lasti) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -6662,18 +6662,18 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx
*ctx, boolean src_requires_l
struct r600_bytecode_vtx vtx;
struct r600_bytecode_alu alu;
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
- int src_gpr, r, i;
+ int src_gpr, r, chan_index;
int id = tgsi_tex_get_src_gpr(ctx, 1);
src_gpr = tgsi_tex_get_src_gpr(ctx, 0);
if (src_requires_loading) {
- for (i = 0; i < 4; i++) {
+ for (chan_index = 0; chan_index < 4; chan_index++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0],
chan_index);
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
- if (i == 3)
+ alu.dst.chan = chan_index;
+ if (chan_index == 3)
alu.last = 1;
alu.dst.write = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -6702,27 +6702,27 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx
*ctx, boolean src_requires_l
if (ctx->bc->chip_class >= EVERGREEN)
return 0;
- for (i = 0; i < 4; i++) {
+ for (chan_index = 0; chan_index < 4; chan_index++) {
int lasti =
tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_AND_INT;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.sel = vtx.dst_gpr;
alu.dst.write = 1;
alu.src[0].sel = vtx.dst_gpr;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
alu.src[1].sel = R600_SHADER_BUFFER_INFO_SEL;
alu.src[1].sel += (id * 2);
- alu.src[1].chan = i % 4;
+ alu.src[1].chan = chan_index % 4;
alu.src[1].kc_bank = R600_BUFFER_INFO_CONST_BUFFER;
- if (i == lasti)
+ if (chan_index == lasti)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -7669,23 +7669,23 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
- unsigned i, temp_regs[2];
+ unsigned chan_index, temp_regs[2];
int r;
/* optimize if it's just an equal balance */
if (ctx->src[0].sel == V_SQ_ALU_SRC_0_5) {
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 <<
chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_ADD;
- r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
- r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[1],
chan_index);
+ r600_bytecode_src(&alu.src[1], &ctx->src[2],
chan_index);
alu.omod = 3;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.chan = i;
- if (i == lasti) {
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.dst.chan = chan_index;
+ if (chan_index == lasti) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -7696,19 +7696,19 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
}
/* 1 - src0 */
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_ADD;
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
- r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], chan_index);
r600_bytecode_src_toggle_neg(&alu.src[1]);
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
- if (i == lasti) {
+ alu.dst.chan = chan_index;
+ if (chan_index == lasti) {
alu.last = 1;
}
alu.dst.write = 1;
@@ -7718,18 +7718,18 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
}
/* (1 - src0) * src2 */
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP2_MUL;
alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = i;
- r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
+ alu.src[0].chan = chan_index;
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], chan_index);
alu.dst.sel = ctx->temp_reg;
- alu.dst.chan = i;
- if (i == lasti) {
+ alu.dst.chan = chan_index;
+ if (chan_index == lasti) {
alu.last = 1;
}
alu.dst.write = 1;
@@ -7748,25 +7748,25 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
else
temp_regs[1] = 0;
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP3_MULADD;
alu.is_op3 = 1;
- r = tgsi_make_src_for_op3(ctx, temp_regs[0], i, &alu.src[0],
&ctx->src[0]);
+ r = tgsi_make_src_for_op3(ctx, temp_regs[0], chan_index,
&alu.src[0], &ctx->src[0]);
if (r)
return r;
- r = tgsi_make_src_for_op3(ctx, temp_regs[1], i, &alu.src[1],
&ctx->src[1]);
+ r = tgsi_make_src_for_op3(ctx, temp_regs[1], chan_index,
&alu.src[1], &ctx->src[1]);
if (r)
return r;
alu.src[2].sel = ctx->temp_reg;
- alu.src[2].chan = i;
+ alu.src[2].chan = chan_index;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.chan = i;
- if (i == lasti) {
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.dst.chan = chan_index;
+ if (chan_index == lasti) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -7780,7 +7780,7 @@ static int tgsi_cmp(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r, j;
+ int chan_index, r, j;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
int temp_regs[3];
unsigned op;
@@ -7799,26 +7799,26 @@ static int tgsi_cmp(struct r600_shader_ctx *ctx)
temp_regs[j] = r600_get_temp(ctx);
}
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = op;
- r = tgsi_make_src_for_op3(ctx, temp_regs[0], i, &alu.src[0],
&ctx->src[0]);
+ r = tgsi_make_src_for_op3(ctx, temp_regs[0], chan_index,
&alu.src[0], &ctx->src[0]);
if (r)
return r;
- r = tgsi_make_src_for_op3(ctx, temp_regs[2], i, &alu.src[1],
&ctx->src[2]);
+ r = tgsi_make_src_for_op3(ctx, temp_regs[2], chan_index,
&alu.src[1], &ctx->src[2]);
if (r)
return r;
- r = tgsi_make_src_for_op3(ctx, temp_regs[1], i, &alu.src[2],
&ctx->src[1]);
+ r = tgsi_make_src_for_op3(ctx, temp_regs[1], chan_index,
&alu.src[2], &ctx->src[1]);
if (r)
return r;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.chan = i;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
alu.is_op3 = 1;
- if (i == lasti)
+ if (chan_index == lasti)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -7831,23 +7831,23 @@ static int tgsi_ucmp(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, r;
+ int chan_index, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP3_CNDE_INT;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
- r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
- r600_bytecode_src(&alu.src[2], &ctx->src[1], i);
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.chan = i;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], chan_index);
+ r600_bytecode_src(&alu.src[2], &ctx->src[1], chan_index);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
alu.is_op3 = 1;
- if (i == lasti)
+ if (chan_index == lasti)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -8322,7 +8322,7 @@ static int tgsi_eg_arl(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r;
- int i, lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int chan_index, lasti =
tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
unsigned reg = get_address_file_reg(ctx, inst->Dst[0].Register.Index);
assert(inst->Dst[0].Register.Index < 3);
@@ -8343,13 +8343,13 @@ static int tgsi_eg_arl(struct r600_shader_ctx *ctx)
return -1;
}
- for (i = 0; i <= lasti; ++i) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index <= lasti; ++chan_index) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
- alu.last = i == lasti;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], chan_index);
+ alu.last = chan_index == lasti;
alu.dst.sel = reg;
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.write = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
@@ -8368,7 +8368,7 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r;
- int i, lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int chan_index, lasti =
tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ARL:
@@ -8376,11 +8376,11 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
alu.op = ALU_OP1_FLOOR;
alu.dst.sel = ctx->bc->ar_reg;
alu.dst.write = 1;
- for (i = 0; i <= lasti; ++i) {
- if (inst->Dst[0].Register.WriteMask & (1 << i)) {
- alu.dst.chan = i;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
- alu.last = i == lasti;
+ for (chan_index = 0; chan_index <= lasti; ++chan_index) {
+ if (inst->Dst[0].Register.WriteMask & (1 <<
chan_index)) {
+ alu.dst.chan = chan_index;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0],
chan_index);
+ alu.last = chan_index == lasti;
if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
}
@@ -8393,9 +8393,9 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
alu.dst.write = 1;
/* FLT_TO_INT is trans-only on r600/r700 */
alu.last = TRUE;
- for (i = 0; i <= lasti; ++i) {
- alu.dst.chan = i;
- alu.src[0].chan = i;
+ for (chan_index = 0; chan_index <= lasti; ++chan_index) {
+ alu.dst.chan = chan_index;
+ alu.src[0].chan = chan_index;
if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
}
@@ -8407,10 +8407,10 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
alu.dst.write = 1;
/* FLT_TO_INT is trans-only on r600/r700 */
alu.last = TRUE;
- for (i = 0; i <= lasti; ++i) {
- if (inst->Dst[0].Register.WriteMask & (1 << i)) {
- alu.dst.chan = i;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ for (chan_index = 0; chan_index <= lasti; ++chan_index) {
+ if (inst->Dst[0].Register.WriteMask & (1 <<
chan_index)) {
+ alu.dst.chan = chan_index;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0],
chan_index);
if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
}
@@ -8421,11 +8421,11 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
alu.op = ALU_OP1_MOV;
alu.dst.sel = ctx->bc->ar_reg;
alu.dst.write = 1;
- for (i = 0; i <= lasti; ++i) {
- if (inst->Dst[0].Register.WriteMask & (1 << i)) {
- alu.dst.chan = i;
- r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
- alu.last = i == lasti;
+ for (chan_index = 0; chan_index <= lasti; ++chan_index) {
+ if (inst->Dst[0].Register.WriteMask & (1 <<
chan_index)) {
+ alu.dst.chan = chan_index;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0],
chan_index);
+ alu.last = chan_index == lasti;
if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
}
@@ -8899,12 +8899,12 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, j, k, r;
+ int chan_index, j, k, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
/* src0 * src1 */
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
if (ctx->bc->chip_class == CAYMAN) {
@@ -8913,11 +8913,11 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
alu.op = ALU_OP2_MULLO_UINT;
for (k = 0; k < inst->Instruction.NumSrcRegs;
k++) {
- r600_bytecode_src(&alu.src[k],
&ctx->src[k], i);
+ r600_bytecode_src(&alu.src[k],
&ctx->src[k], chan_index);
}
alu.dst.chan = j;
alu.dst.sel = ctx->temp_reg;
- alu.dst.write = (j == i);
+ alu.dst.write = (j == chan_index);
if (j == 3)
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -8927,13 +8927,13 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
} else {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
- alu.dst.chan = i;
+ alu.dst.chan = chan_index;
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
alu.op = ALU_OP2_MULLO_UINT;
for (j = 0; j < 2; j++) {
- r600_bytecode_src(&alu.src[j], &ctx->src[j], i);
+ r600_bytecode_src(&alu.src[j], &ctx->src[j],
chan_index);
}
alu.last = 1;
@@ -8944,20 +8944,20 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
}
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.op = ALU_OP2_ADD_INT;
alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = i;
+ alu.src[0].chan = chan_index;
- r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
- if (i == lasti) {
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], chan_index);
+ if (chan_index == lasti) {
alu.last = 1;
}
r = r600_bytecode_add_alu(ctx->bc, &alu);
@@ -8971,7 +8971,7 @@ static int tgsi_pk2h(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int r, i;
+ int r, chan_index;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
/* temp.xy = f32_to_f16(src) */
@@ -8992,15 +8992,15 @@ static int tgsi_pk2h(struct r600_shader_ctx *ctx)
return r;
/* dst.x = temp.y * 0x10000 + temp.x */
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP3_MULADD_UINT24;
alu.is_op3 = 1;
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.last = i == lasti;
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
+ alu.last = chan_index == lasti;
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 1;
alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
@@ -9019,7 +9019,7 @@ static int tgsi_up2h(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int r, i;
+ int r, chan_index;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
/* temp.x = src.x */
@@ -9049,15 +9049,15 @@ static int tgsi_up2h(struct r600_shader_ctx *ctx)
return r;
/* dst.wz = dst.xy = f16_to_f32(temp.xy) */
- for (i = 0; i < lasti + 1; i++) {
- if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ for (chan_index = 0; chan_index < lasti + 1; chan_index++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << chan_index)))
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ tgsi_dst(ctx, &inst->Dst[0], chan_index, &alu.dst);
alu.op = ALU_OP1_FLT16_TO_FLT32;
alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = i % 2;
- alu.last = i == lasti;
+ alu.src[0].chan = chan_index % 2;
+ alu.last = chan_index == lasti;
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
--
2.11.1
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