================
@@ -4069,6 +4069,22 @@ let Predicates = [HasSVE2_or_SME] in {
let AddedComplexity = 2 in {
def : Pat<(nxv16i8 (AArch64ext nxv16i8:$zn1, nxv16i8:$zn2, (i32
imm0_255:$imm))),
(EXT_ZZI_B (REG_SEQUENCE ZPR2, $zn1, zsub0, $zn2, zsub1),
imm0_255:$imm)>;
+
+ foreach VT = [nxv16i8] in
+ def : Pat<(VT (vector_splice VT:$Z1, VT:$Z2, (i64 (sve_ext_imm_0_255
i32:$index)))),
+ (EXT_ZZI_B (REG_SEQUENCE ZPR2, $Z1, zsub0, $Z2, zsub1),
imm0_255:$index)>;
----------------
gbossu wrote:
What do you mean by different output? Do you mean that if you replce the splice
intrisics with AArch64's EXT intrinsics, then
`llvm/test/CodeGen/AArch64/sve-vector-splice.ll` has different CHECK lines?
For a generic splice with two inputs, I'd expect the output to be the same. The
change I made in the first PR is only for "subvector-extract" splice
instructions created when lowering vector_extract, where we can mark the second
input as `undef`.
When you say removing the former, do you mean removing the pattern? Or the
intrinsic altogether? I would need to refresh my brain after the week-end but I
think llvm's vector_splice, AArch64 EXT and AArch64 SPLICE all have slightly
different semantics (especially for negative indices).
https://github.com/llvm/llvm-project/pull/151730
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