llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-loongarch Author: None (llvmbot) <details> <summary>Changes</summary> Backport a19ddff980136835fead07b346bd83e9211124a0 30e519e1ad185701eb9593f6c727c808d7590d1b Requested by: @<!-- -->zhaoqi5 --- Full diff: https://github.com/llvm/llvm-project/pull/146004.diff 2 Files Affected: - (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp (+1-1) - (added) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll (+30) ``````````diff diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp index 4ed3c3cf92e3e..98b7a1126e560 100644 --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp @@ -1209,7 +1209,7 @@ static SDValue lowerVECTOR_SHUFFLE_XVSHUF(const SDLoc &DL, ArrayRef<int> Mask, if (*it < 0) // UNDEF MaskAlloc.push_back(DAG.getTargetConstant(0, DL, MVT::i64)); else if ((*it >= 0 && *it < HalfSize) || - (*it >= MaskSize && *it <= MaskSize + HalfSize)) { + (*it >= MaskSize && *it < MaskSize + HalfSize)) { int M = *it < HalfSize ? *it : *it - HalfSize; MaskAlloc.push_back(DAG.getTargetConstant(M, DL, MVT::i64)); } else diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll new file mode 100644 index 0000000000000..f3bec11810e9b --- /dev/null +++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll @@ -0,0 +1,30 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc --mtriple=loongarch64 --mattr=+lasx %s -o - | FileCheck %s + +;; Fix https://github.com/llvm/llvm-project/issues/137000. + +define <4 x double> @shufflevector_v4f64(<4 x double> %a, <4 x double> %b) { +; CHECK-LABEL: shufflevector_v4f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 0 +; CHECK-NEXT: movgr2fr.d $fa2, $a0 +; CHECK-NEXT: xvpickve2gr.d $a0, $xr1, 2 +; CHECK-NEXT: movgr2fr.d $fa3, $a0 +; CHECK-NEXT: movfr2gr.d $a0, $fa2 +; CHECK-NEXT: xvinsgr2vr.d $xr2, $a0, 0 +; CHECK-NEXT: movfr2gr.d $a0, $fa3 +; CHECK-NEXT: xvinsgr2vr.d $xr2, $a0, 1 +; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 3 +; CHECK-NEXT: movgr2fr.d $fa0, $a0 +; CHECK-NEXT: xvpickve2gr.d $a0, $xr1, 3 +; CHECK-NEXT: movgr2fr.d $fa1, $a0 +; CHECK-NEXT: movfr2gr.d $a0, $fa0 +; CHECK-NEXT: xvinsgr2vr.d $xr2, $a0, 2 +; CHECK-NEXT: movfr2gr.d $a0, $fa1 +; CHECK-NEXT: xvinsgr2vr.d $xr2, $a0, 3 +; CHECK-NEXT: xvori.b $xr0, $xr2, 0 +; CHECK-NEXT: ret +entry: + %c = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 6, i32 3, i32 7> + ret <4 x double> %c +} `````````` </details> https://github.com/llvm/llvm-project/pull/146004 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
