[llvm-branch-commits] [SPARC][IAS] Add definitions for OSA 2011 instructions (PR #138403)

[Sergei Barannikov via llvm-branch-commits]

================
@@ -217,6 +243,18 @@ unsigned SparcMCCodeEmitter::getBranchOnRegTargetOpValue(
   return 0;
 }
 
+unsigned SparcMCCodeEmitter::getCompareAndBranchTargetOpValue(
+    const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups,
+    const MCSubtargetInfo &STI) const {
+  const MCOperand &MO = MI.getOperand(OpNo);
+  if (MO.isReg() || MO.isImm())
----------------
s-barannikov wrote:

It can't be a register, can it?

https://github.com/llvm/llvm-project/pull/138403
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