================
@@ -734,6 +737,69 @@ bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
return false;
}
+bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
+ SmallVectorImpl<MCInst> &Instructions) {
+ MCOperand MCRegOp = Inst.getOperand(0);
+ MCOperand MCValOp = Inst.getOperand(1);
+ assert(MCRegOp.isReg());
+ assert(MCValOp.isImm() || MCValOp.isExpr());
+
+ // the imm operand can be either an expression or an immediate.
+ bool IsImm = Inst.getOperand(1).isImm();
+ int64_t ImmValue = IsImm ? MCValOp.getImm() : 0;
+ const MCExpr *ValExpr = IsImm ? MCConstantExpr::create(ImmValue,
getContext())
+ : MCValOp.getExpr();
+
+ bool IsSmallImm = IsImm && isInt<13>(ImmValue);
+ bool NoLowBitsImm = IsImm && ((ImmValue & 0x3FF) == 0);
+
+ MCOperand PrevReg = MCOperand::createReg(Sparc::G0);
+
+ if (!isInt<32>(ImmValue)) {
+ return Error(IDLoc,
+ "set: argument must be between -2147483648 and 2147483647");
+ }
+
+ // Very small immediates can be expressed without emitting a sethi.
+ if (!IsSmallImm) {
+ // sethi %hi(val), rd
+ Instructions.push_back(
+ MCInstBuilder(SP::SETHIi)
+ .addReg(MCRegOp.getReg())
+ .addExpr(adjustPICRelocation(SparcMCExpr::VK_Sparc_HI, ValExpr)));
+
+ PrevReg = MCRegOp;
+ }
+
+ // If the immediate has the lower bits set or is small, we need to emit an
or.
+ if (!NoLowBitsImm || IsSmallImm) {
+ const MCExpr *Expr =
+ IsSmallImm ? ValExpr
+ : adjustPICRelocation(SparcMCExpr::VK_Sparc_LO, ValExpr);
+
+ // or rd, %lo(val), rd
----------------
s-barannikov wrote:
(very minor nit) extra spaces here and in the snippet below
https://github.com/llvm/llvm-project/pull/125150
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