================ @@ -734,6 +737,69 @@ bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc, return false; } +bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc, + SmallVectorImpl<MCInst> &Instructions) { + MCOperand MCRegOp = Inst.getOperand(0); + MCOperand MCValOp = Inst.getOperand(1); + assert(MCRegOp.isReg()); + assert(MCValOp.isImm() || MCValOp.isExpr()); + + // the imm operand can be either an expression or an immediate. + bool IsImm = Inst.getOperand(1).isImm(); + int64_t ImmValue = IsImm ? MCValOp.getImm() : 0; + const MCExpr *ValExpr = IsImm ? MCConstantExpr::create(ImmValue, getContext()) + : MCValOp.getExpr(); + + bool IsSmallImm = IsImm && isInt<13>(ImmValue); ---------------- s-barannikov wrote:
You're right, sorry https://github.com/llvm/llvm-project/pull/125150 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits