================ @@ -66,9 +81,232 @@ FunctionPass *llvm::createAMDGPURegBankSelectPass() { return new AMDGPURegBankSelect(); } +class RegBankSelectHelper { + MachineIRBuilder &B; + MachineRegisterInfo &MRI; + AMDGPU::IntrinsicLaneMaskAnalyzer &ILMA; + const MachineUniformityInfo &MUI; + const SIRegisterInfo &TRI; + const RegisterBank *SgprRB; + const RegisterBank *VgprRB; + const RegisterBank *VccRB; + +public: + RegBankSelectHelper(MachineIRBuilder &B, + AMDGPU::IntrinsicLaneMaskAnalyzer &ILMA, + const MachineUniformityInfo &MUI, + const SIRegisterInfo &TRI, const RegisterBankInfo &RBI) + : B(B), MRI(*B.getMRI()), ILMA(ILMA), MUI(MUI), TRI(TRI), + SgprRB(&RBI.getRegBank(AMDGPU::SGPRRegBankID)), + VgprRB(&RBI.getRegBank(AMDGPU::VGPRRegBankID)), + VccRB(&RBI.getRegBank(AMDGPU::VCCRegBankID)) {} + + bool shouldRegBankSelect(MachineInstr &MI) { + return MI.isPreISelOpcode() || MI.isCopy(); + } + + // Temporal divergence copy: COPY to vgpr with implicit use of $exec inside of + // the cycle + // Note: uniformity analysis does not consider that registers with vgpr def + // are divergent (you can have uniform value in vgpr). + // - TODO: implicit use of $exec could be implemented as indicator that + // instruction is divergent + bool isTemporalDivergenceCopy(Register Reg) { + MachineInstr *MI = MRI.getVRegDef(Reg); + if (!MI->isCopy()) + return false; + + for (auto Op : MI->implicit_operands()) { ---------------- petar-avramovic wrote:
There is nothing useful in real operands, it is a simple sgpr to vgpr COPY which is quite common. What makes that COPY special is implicit exec, for example: `%21:vgpr_32(s32) = COPY %8:sgpr(s32), implicit $exec_lo` implicit exec is there to stop other passes from moving the COPY outside of the loop. https://github.com/llvm/llvm-project/pull/112863 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits