Author: Kazu Hirata Date: 2020-12-13T19:35:10-08:00 New Revision: 913515e4652c35221420db1575254d3e935ef835
URL: https://github.com/llvm/llvm-project/commit/913515e4652c35221420db1575254d3e935ef835 DIFF: https://github.com/llvm/llvm-project/commit/913515e4652c35221420db1575254d3e935ef835.diff LOG: [Target] Use llvm::is_contained (NFC) Added: Modified: llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp llvm/lib/Target/Hexagon/HexagonSubtarget.cpp llvm/lib/Target/PowerPC/PPCMIPeephole.cpp llvm/lib/Target/X86/X86ISelLowering.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp index f39c8e889043..f228e0a23794 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp @@ -283,7 +283,7 @@ HexagonTargetLowering::getPreferredHvxVectorAction(MVT VecTy) const { // widen the vector. Note: the threshold was not selected in // any scientific way. ArrayRef<MVT> Tys = Subtarget.getHVXElementTypes(); - if (llvm::find(Tys, ElemTy) != Tys.end()) { + if (llvm::is_contained(Tys, ElemTy)) { unsigned VecWidth = VecTy.getSizeInBits(); bool HaveThreshold = HvxWidenThreshold.getNumOccurrences() > 0; if (HaveThreshold && 8*HvxWidenThreshold <= VecWidth) diff --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp index b79e7c213a37..fed1abb9549b 100644 --- a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp @@ -133,7 +133,7 @@ bool HexagonSubtarget::isHVXElementType(MVT Ty, bool IncludeBool) const { if (IncludeBool && Ty == MVT::i1) return true; ArrayRef<MVT> ElemTypes = getHVXElementTypes(); - return llvm::find(ElemTypes, Ty) != ElemTypes.end(); + return llvm::is_contained(ElemTypes, Ty); } bool HexagonSubtarget::isHVXVectorType(MVT VecTy, bool IncludeBool) const { @@ -159,7 +159,7 @@ bool HexagonSubtarget::isHVXVectorType(MVT VecTy, bool IncludeBool) const { unsigned VecWidth = VecTy.getSizeInBits(); if (VecWidth != 8 * HwLen && VecWidth != 16 * HwLen) return false; - return llvm::find(ElemTypes, ElemTy) != ElemTypes.end(); + return llvm::is_contained(ElemTypes, ElemTy); } bool HexagonSubtarget::isTypeForHVX(Type *VecTy, bool IncludeBool) const { diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp index 633f216388d0..307fffae870c 100644 --- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp +++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp @@ -302,7 +302,7 @@ static bool collectUnprimedAccPHIs(MachineRegisterInfo *MRI, // code. if (Opcode != PPC::PHI) continue; - if (std::find(PHIs.begin(), PHIs.end(), Instr) != PHIs.end()) + if (llvm::is_contained(PHIs, Instr)) return false; PHIs.push_back(Instr); } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b4a397080284..dade38c0538a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18280,7 +18280,7 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, const X86Subtarget &Subtarget, // Modify the new Mask to take all zeros from the all-zero vector. // Choose indices that are blend-friendly. bool UsedZeroVector = false; - assert(find(WidenedMask, SM_SentinelZero) != WidenedMask.end() && + assert(is_contained(WidenedMask, SM_SentinelZero) && "V2's non-undef elements are used?!"); for (int i = 0; i != NewNumElts; ++i) if (WidenedMask[i] == SM_SentinelZero) { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
