Author: hans Date: Wed Jan 24 07:38:38 2018 New Revision: 323335 URL: http://llvm.org/viewvc/llvm-project?rev=323335&view=rev Log: Merging r323190: ------------------------------------------------------------------------ r323190 | rksimon | 2018-01-23 12:39:06 +0100 (Tue, 23 Jan 2018) | 5 lines
[X86][SSE] LowerBUILD_VECTORAsVariablePermute - fix PSHUFB source/index operand ordering As detailed in rL317463, PSHUFB (like most variable shuffle instructions) uses Op[0] for the source vector and Op[1] for the shuffle index vector, VPERMV works in reverse which is probably where the confusion comes from. Differential Revision: https://reviews.llvm.org/D42380 ------------------------------------------------------------------------ Modified: llvm/branches/release_60/ (props changed) llvm/branches/release_60/lib/Target/X86/X86ISelLowering.cpp llvm/branches/release_60/test/CodeGen/X86/var-permute-128.ll Propchange: llvm/branches/release_60/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Wed Jan 24 07:38:38 2018 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,321751,321789,321791,321806,321862,321870,321872,321878,321980,321991,321993-321994,322003,322053,322056,322103,322106,322223,322272,322313,322372,322473,322623,322644,322724,322767,322875,322878-322879,322904-322905,322973,322993,323034 +/llvm/trunk:155241,321751,321789,321791,321806,321862,321870,321872,321878,321980,321991,321993-321994,322003,322053,322056,322103,322106,322223,322272,322313,322372,322473,322623,322644,322724,322767,322875,322878-322879,322904-322905,322973,322993,323034,323190 Modified: llvm/branches/release_60/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_60/lib/Target/X86/X86ISelLowering.cpp?rev=323335&r1=323334&r2=323335&view=diff ============================================================================== --- llvm/branches/release_60/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/branches/release_60/lib/Target/X86/X86ISelLowering.cpp Wed Jan 24 07:38:38 2018 @@ -7898,8 +7898,9 @@ LowerBUILD_VECTORAsVariablePermute(SDVal DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(SrcVec), VT, DAG.getUNDEF(VT), SrcVec, DAG.getIntPtrConstant(0, SDLoc(SrcVec))); } - return DAG.getNode(VT == MVT::v16i8 ? X86ISD::PSHUFB : X86ISD::VPERMV, - SDLoc(V), VT, IndicesVec, SrcVec); + if (VT == MVT::v16i8) + return DAG.getNode(X86ISD::PSHUFB, SDLoc(V), VT, SrcVec, IndicesVec); + return DAG.getNode(X86ISD::VPERMV, SDLoc(V), VT, IndicesVec, SrcVec); } SDValue Modified: llvm/branches/release_60/test/CodeGen/X86/var-permute-128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_60/test/CodeGen/X86/var-permute-128.ll?rev=323335&r1=323334&r2=323335&view=diff ============================================================================== --- llvm/branches/release_60/test/CodeGen/X86/var-permute-128.ll (original) +++ llvm/branches/release_60/test/CodeGen/X86/var-permute-128.ll Wed Jan 24 07:38:38 2018 @@ -207,13 +207,12 @@ define <8 x i16> @var_shuffle_v8i16(<8 x define <16 x i8> @var_shuffle_v16i8(<16 x i8> %v, <16 x i8> %indices) nounwind { ; SSSE3-LABEL: var_shuffle_v16i8: ; SSSE3: # %bb.0: -; SSSE3-NEXT: pshufb %xmm0, %xmm1 -; SSSE3-NEXT: movdqa %xmm1, %xmm0 +; SSSE3-NEXT: pshufb %xmm1, %xmm0 ; SSSE3-NEXT: retq ; ; AVX-LABEL: var_shuffle_v16i8: ; AVX: # %bb.0: -; AVX-NEXT: vpshufb %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %index0 = extractelement <16 x i8> %indices, i32 0 %index1 = extractelement <16 x i8> %indices, i32 1 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
