Author: hans Date: Wed Jan 25 11:14:48 2017 New Revision: 293074 URL: http://llvm.org/viewvc/llvm-project?rev=293074&view=rev Log: Merging r293025: ------------------------------------------------------------------------ r293025 | ahatanak | 2017-01-24 22:21:51 -0800 (Tue, 24 Jan 2017) | 29 lines
[SimplifyCFG] Do not sink and merge inline-asm instructions. Conservatively disable sinking and merging inline-asm instructions as doing so can potentially create arguments that cannot satisfy the inline-asm constraints. For example, SimplifyCFG used to do the following transformation: (before) if.then: %0 = call i32 asm "rorl $2, $0", "=&r,0,n"(i32 %r6, i32 8) br label %if.end if.else: %1 = call i32 asm "rorl $2, $0", "=&r,0,n"(i32 %r6, i32 6) br label %if.end (after) %.sink = select i1 %tobool, i32 6, i32 8 %0 = call i32 asm "rorl $2, $0", "=&r,0,n"(i32 %r6, i32 %.sink) This would result in a crash in the backend since only immediate integer operands are permitted for constraint "n". rdar://problem/30110806 Differential Revision: https://reviews.llvm.org/D29111 ------------------------------------------------------------------------ Modified: llvm/branches/release_40/ (props changed) llvm/branches/release_40/lib/Transforms/Utils/SimplifyCFG.cpp llvm/branches/release_40/test/Transforms/SimplifyCFG/sink-common-code.ll Propchange: llvm/branches/release_40/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Wed Jan 25 11:14:48 2017 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,291858-291859,291863,291875,291909,291966,291968,291979,292133,292242,292254-292255,292280,292323,292444,292467,292583,292625,292641,292667,292711,292758 +/llvm/trunk:155241,291858-291859,291863,291875,291909,291966,291968,291979,292133,292242,292254-292255,292280,292323,292444,292467,292583,292625,292641,292667,292711,292758,293025 Modified: llvm/branches/release_40/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/lib/Transforms/Utils/SimplifyCFG.cpp?rev=293074&r1=293073&r2=293074&view=diff ============================================================================== --- llvm/branches/release_40/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/branches/release_40/lib/Transforms/Utils/SimplifyCFG.cpp Wed Jan 25 11:14:48 2017 @@ -1436,6 +1436,14 @@ static bool canSinkInstructions( if (isa<PHINode>(I) || I->isEHPad() || isa<AllocaInst>(I) || I->getType()->isTokenTy()) return false; + + // Conservatively return false if I is an inline-asm instruction. Sinking + // and merging inline-asm instructions can potentially create arguments + // that cannot satisfy the inline-asm constraints. + if (const auto *C = dyn_cast<CallInst>(I)) + if (C->isInlineAsm()) + return false; + // Everything must have only one use too, apart from stores which // have no uses. if (!isa<StoreInst>(I) && !I->hasOneUse()) Modified: llvm/branches/release_40/test/Transforms/SimplifyCFG/sink-common-code.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/test/Transforms/SimplifyCFG/sink-common-code.ll?rev=293074&r1=293073&r2=293074&view=diff ============================================================================== --- llvm/branches/release_40/test/Transforms/SimplifyCFG/sink-common-code.ll (original) +++ llvm/branches/release_40/test/Transforms/SimplifyCFG/sink-common-code.ll Wed Jan 25 11:14:48 2017 @@ -768,6 +768,30 @@ if.end: ; CHECK-NOT: exact ; CHECK: } +; Check that simplifycfg doesn't sink and merge inline-asm instructions. + +define i32 @test_inline_asm1(i32 %c, i32 %r6) { +entry: + %tobool = icmp eq i32 %c, 0 + br i1 %tobool, label %if.else, label %if.then + +if.then: + %0 = call i32 asm "rorl $2, $0", "=&r,0,n,~{dirflag},~{fpsr},~{flags}"(i32 %r6, i32 8) + br label %if.end + +if.else: + %1 = call i32 asm "rorl $2, $0", "=&r,0,n,~{dirflag},~{fpsr},~{flags}"(i32 %r6, i32 6) + br label %if.end + +if.end: + %r6.addr.0 = phi i32 [ %0, %if.then ], [ %1, %if.else ] + ret i32 %r6.addr.0 +} + +; CHECK-LABEL: @test_inline_asm1( +; CHECK: call i32 asm "rorl $2, $0", "=&r,0,n,~{dirflag},~{fpsr},~{flags}"(i32 %r6, i32 8) +; CHECK: call i32 asm "rorl $2, $0", "=&r,0,n,~{dirflag},~{fpsr},~{flags}"(i32 %r6, i32 6) + declare i32 @call_target() define void @test_operand_bundles(i1 %cond, i32* %ptr) { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
