Author: rengolin Date: Sat Apr 2 15:31:15 2016 New Revision: 265243 URL: http://llvm.org/viewvc/llvm-project?rev=265243&view=rev Log: Merging r263118: ARM: correct __builtin_longjmp on WoA
Added: llvm/branches/release_38/test/CodeGen/ARM/Windows/builtin_longjmp.ll Modified: llvm/branches/release_38/lib/Target/ARM/ARMAsmPrinter.cpp Modified: llvm/branches/release_38/lib/Target/ARM/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/ARM/ARMAsmPrinter.cpp?rev=265243&r1=265242&r2=265243&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/ARM/ARMAsmPrinter.cpp (original) +++ llvm/branches/release_38/lib/Target/ARM/ARMAsmPrinter.cpp Sat Apr 2 15:31:15 2016 @@ -1843,8 +1843,10 @@ void ARMAsmPrinter::EmitInstruction(cons // ldr $scratch, [$src, #4] // ldr r7, [$src] // bx $scratch + const Triple &TT = TM.getTargetTriple(); unsigned SrcReg = MI->getOperand(0).getReg(); unsigned ScratchReg = MI->getOperand(1).getReg(); + EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tLDRi) .addReg(ScratchReg) .addReg(SrcReg) @@ -1871,7 +1873,7 @@ void ARMAsmPrinter::EmitInstruction(cons .addReg(0)); EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tLDRi) - .addReg(ARM::R7) + .addReg(TT.isOSWindows() ? ARM::R11 : ARM::R7) .addReg(SrcReg) .addImm(0) // Predicate. Added: llvm/branches/release_38/test/CodeGen/ARM/Windows/builtin_longjmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/CodeGen/ARM/Windows/builtin_longjmp.ll?rev=265243&view=auto ============================================================================== --- llvm/branches/release_38/test/CodeGen/ARM/Windows/builtin_longjmp.ll (added) +++ llvm/branches/release_38/test/CodeGen/ARM/Windows/builtin_longjmp.ll Sat Apr 2 15:31:15 2016 @@ -0,0 +1,16 @@ +; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s + +declare void @llvm.eh.sjlj.longjmp(i8*) + +define arm_aapcs_vfpcc void @test___builtin_longjump(i8* %b) { +entry: + tail call void @llvm.eh.sjlj.longjmp(i8* %b) + unreachable +} + +; CHECK: ldr r[[SP:[0-9]+]], [r0, #8] +; CHECK: mov sp, r[[SP]] +; CHECK: ldr r[[PC:[0-9]+]], [r0, #4] +; CHECK: ldr r11, [r0] +; CHECK: bx r[[PC]] + _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits