Author: Michał Górny Date: 2021-09-16T10:23:31+02:00 New Revision: c208deb9008260d3effc00c98493434a65af4b8d
URL: https://github.com/llvm/llvm-project/commit/c208deb9008260d3effc00c98493434a65af4b8d DIFF: https://github.com/llvm/llvm-project/commit/c208deb9008260d3effc00c98493434a65af4b8d.diff LOG: [lldb] [ABI/AArch64] Recognize special regs by their xN names too Recognize lr/sp/fp by their numeric register names in the ABI plugin. This is necessary to mark them appropriately when interfacing with gdbserver. Differential Revision: https://reviews.llvm.org/D109691 Added: Modified: lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py Removed: ################################################################################ diff --git a/lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp b/lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp index 42d73ce39ed6f..619c45dc12ec2 100644 --- a/lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp +++ b/lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp @@ -55,9 +55,9 @@ std::string ABIAArch64::GetMCName(std::string reg) { uint32_t ABIAArch64::GetGenericNum(llvm::StringRef name) { return llvm::StringSwitch<uint32_t>(name) .Case("pc", LLDB_REGNUM_GENERIC_PC) - .Case("lr", LLDB_REGNUM_GENERIC_RA) - .Case("sp", LLDB_REGNUM_GENERIC_SP) - .Case("fp", LLDB_REGNUM_GENERIC_FP) + .Cases("lr", "x30", LLDB_REGNUM_GENERIC_RA) + .Cases("sp", "x31", LLDB_REGNUM_GENERIC_SP) + .Cases("fp", "x29", LLDB_REGNUM_GENERIC_FP) .Case("cpsr", LLDB_REGNUM_GENERIC_FLAGS) .Case("x0", LLDB_REGNUM_GENERIC_ARG1) .Case("x1", LLDB_REGNUM_GENERIC_ARG2) diff --git a/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py b/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py index eabd7d807f5b3..13d7804286138 100644 --- a/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py +++ b/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py @@ -409,5 +409,11 @@ def haltReason(self): ["x0 = 0x0807060504030201"]) self.match("register read arg2", ["x1 = 0x1817161514131211"]) + self.match("register read fp", + ["x29 = 0x3837363534333231"]) + self.match("register read lr", + ["x30 = 0x4847464544434241"]) + self.match("register read ra", + ["x30 = 0x4847464544434241"]) self.match("register read flags", ["cpsr = 0x74737271"]) _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
