Author: Michał Górny Date: 2021-09-16T10:23:31+02:00 New Revision: 66249323d25f6db1dc76bd9fb3b9eebe436519a6
URL: https://github.com/llvm/llvm-project/commit/66249323d25f6db1dc76bd9fb3b9eebe436519a6 DIFF: https://github.com/llvm/llvm-project/commit/66249323d25f6db1dc76bd9fb3b9eebe436519a6.diff LOG: [lldb] [gdb-remote] Try using <architecture/> for remote arch unconditionally Try determining the process architecture from <architecture/> tag unconditionally, rather than for very specific cases. Generic gdbserver implementations do not support LLDB-specific packets used to determine the process architecture, therefore this fallback is necessary to support architecture-specific behavior on these targets. Rather than maintaining a mapping of all known architectures, just try mapping the GDB values into triplets, as that is going to work most of the time. This change is confirmed to fix LLDB against gdbserver when debugging i386 and aarch64 executables. Differential Revision: https://reviews.llvm.org/D109272 Added: lldb/test/API/functionalities/gdb_remote_client/basic_eh_frame-i386.yaml Modified: lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py Removed: ################################################################################ diff --git a/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp b/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp index b08fe3819bb97..87ad0a377ae2e 100644 --- a/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp +++ b/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp @@ -4649,24 +4649,22 @@ bool ProcessGDBRemote::GetGDBServerRegisterInfoXMLAndProcess( } } - // If the target.xml includes an architecture entry like + // gdbserver does not implement the LLDB packets used to determine host + // or process architecture. If that is the case, attempt to use + // the <architecture/> field from target.xml, e.g.: + // // <architecture>i386:x86-64</architecture> (seen from VMWare ESXi) - // <architecture>arm</architecture> (seen from Segger JLink on unspecified arm board) - // use that if we don't have anything better. + // <architecture>arm</architecture> (seen from Segger JLink on unspecified + // arm board) if (!arch_to_use.IsValid() && !target_info.arch.empty()) { - if (target_info.arch == "i386:x86-64") { - // We don't have any information about vendor or OS. - arch_to_use.SetTriple("x86_64--"); - GetTarget().MergeArchitecture(arch_to_use); - } + // We don't have any information about vendor or OS. + arch_to_use.SetTriple(llvm::StringSwitch<std::string>(target_info.arch) + .Case("i386:x86-64", "x86_64") + .Default(target_info.arch) + + "--"); - // SEGGER J-Link jtag boards send this very-generic arch name, - // we'll need to use this if we have absolutely nothing better - // to work with or the register definitions won't be accepted. - if (target_info.arch == "arm") { - arch_to_use.SetTriple("arm--"); + if (arch_to_use.IsValid()) GetTarget().MergeArchitecture(arch_to_use); - } } if (arch_to_use.IsValid()) { diff --git a/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py b/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py index 255e36a3104a8..eabd7d807f5b3 100644 --- a/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py +++ b/lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py @@ -150,3 +150,264 @@ def haltReason(self): ["rip = 0x8887868584838281"]) self.match("register read flags", ["eflags = 0x94939291"]) + + @skipIfXmlSupportMissing + @skipIfRemote + @skipIfLLVMTargetMissing("X86") + def test_i386_regs(self): + """Test grabbing various i386 registers from gdbserver.""" + reg_data = [ + "01020304", # eax + "11121314", # ecx + "21222324", # edx + "31323334", # ebx + "41424344", # esp + "51525354", # ebp + "61626364", # esi + "71727374", # edi + "81828384", # eip + "91929394", # eflags + "0102030405060708090a", # st0 + "1112131415161718191a", # st1 + ] + 6 * [ + "2122232425262728292a" # st2..st7 + ] + [ + "8182838485868788898a8b8c8d8e8f90", # xmm0 + "9192939495969798999a9b9c9d9e9fa0", # xmm1 + ] + 6 * [ + "a1a2a3a4a5a6a7a8a9aaabacadaeafb0", # xmm2..xmm7 + ] + [ + "00000000", # mxcsr + ] + [ + "b1b2b3b4b5b6b7b8b9babbbcbdbebfc0", # ymm0h + "c1c2c3c4c5c6c7c8c9cacbcccdcecfd0", # ymm1h + ] + 6 * [ + "d1d2d3d4d5d6d7d8d9dadbdcdddedfe0", # ymm2h..ymm7h + ] + + class MyResponder(MockGDBServerResponder): + def qXferRead(self, obj, annex, offset, length): + if annex == "target.xml": + return """<?xml version="1.0"?> + <!DOCTYPE feature SYSTEM "gdb-target.dtd"> + <target> + <architecture>i386</architecture> + <osabi>GNU/Linux</osabi> + <feature name="org.gnu.gdb.i386.core"> + <reg name="eax" bitsize="32" type="int32" regnum="0"/> + <reg name="ecx" bitsize="32" type="int32" regnum="1"/> + <reg name="edx" bitsize="32" type="int32" regnum="2"/> + <reg name="ebx" bitsize="32" type="int32" regnum="3"/> + <reg name="esp" bitsize="32" type="data_ptr" regnum="4"/> + <reg name="ebp" bitsize="32" type="data_ptr" regnum="5"/> + <reg name="esi" bitsize="32" type="int32" regnum="6"/> + <reg name="edi" bitsize="32" type="int32" regnum="7"/> + <reg name="eip" bitsize="32" type="code_ptr" regnum="8"/> + <reg name="eflags" bitsize="32" type="i386_eflags" regnum="9"/> + <reg name="st0" bitsize="80" type="i387_ext" regnum="16"/> + <reg name="st1" bitsize="80" type="i387_ext" regnum="17"/> + <reg name="st2" bitsize="80" type="i387_ext" regnum="18"/> + <reg name="st3" bitsize="80" type="i387_ext" regnum="19"/> + <reg name="st4" bitsize="80" type="i387_ext" regnum="20"/> + <reg name="st5" bitsize="80" type="i387_ext" regnum="21"/> + <reg name="st6" bitsize="80" type="i387_ext" regnum="22"/> + <reg name="st7" bitsize="80" type="i387_ext" regnum="23"/> + </feature> + <feature name="org.gnu.gdb.i386.sse"> + <reg name="xmm0" bitsize="128" type="vec128" regnum="32"/> + <reg name="xmm1" bitsize="128" type="vec128" regnum="33"/> + <reg name="xmm2" bitsize="128" type="vec128" regnum="34"/> + <reg name="xmm3" bitsize="128" type="vec128" regnum="35"/> + <reg name="xmm4" bitsize="128" type="vec128" regnum="36"/> + <reg name="xmm5" bitsize="128" type="vec128" regnum="37"/> + <reg name="xmm6" bitsize="128" type="vec128" regnum="38"/> + <reg name="xmm7" bitsize="128" type="vec128" regnum="39"/> + <reg name="mxcsr" bitsize="32" type="i386_mxcsr" regnum="40" group="vector"/> + </feature> + <feature name="org.gnu.gdb.i386.avx"> + <reg name="ymm0h" bitsize="128" type="uint128" regnum="42"/> + <reg name="ymm1h" bitsize="128" type="uint128" regnum="43"/> + <reg name="ymm2h" bitsize="128" type="uint128" regnum="44"/> + <reg name="ymm3h" bitsize="128" type="uint128" regnum="45"/> + <reg name="ymm4h" bitsize="128" type="uint128" regnum="46"/> + <reg name="ymm5h" bitsize="128" type="uint128" regnum="47"/> + <reg name="ymm6h" bitsize="128" type="uint128" regnum="48"/> + <reg name="ymm7h" bitsize="128" type="uint128" regnum="49"/> + </feature> + </target>""", False + else: + return None, False + + def readRegister(self, regnum): + return "" + + def readRegisters(self): + return "".join(reg_data) + + def writeRegisters(self, reg_hex): + return "OK" + + def haltReason(self): + return "T02thread:1ff0d;threads:1ff0d;thread-pcs:000000010001bc00;07:0102030405060708;10:1112131415161718;" + + self.server.responder = MyResponder() + + target = self.createTarget("basic_eh_frame-i386.yaml") + process = self.connect(target) + lldbutil.expect_state_changes(self, self.dbg.GetListener(), process, + [lldb.eStateStopped]) + + # test generic aliases + self.match("register read fp", + ["ebp = 0x54535251"]) + self.match("register read pc", + ["eip = 0x84838281"]) + self.match("register read flags", + ["eflags = 0x94939291"]) + + @skipIfXmlSupportMissing + @skipIfRemote + @skipIfLLVMTargetMissing("AArch64") + def test_aarch64_regs(self): + """Test grabbing various aarch64 registers from gdbserver.""" + reg_data = [ + "0102030405060708", # x0 + "1112131415161718", # x1 + ] + 27 * [ + "2122232425262728", # x2..x28 + ] + [ + "3132333435363738", # x29 (fp) + "4142434445464748", # x30 (lr) + "5152535455565758", # x31 (sp) + "6162636465666768", # pc + "71727374", # cpsr + "8182838485868788898a8b8c8d8e8f90", # v0 + "9192939495969798999a9b9c9d9e9fa0", # v1 + ] + 30 * [ + "a1a2a3a4a5a6a7a8a9aaabacadaeafb0", # v2..v31 + ] + [ + "00000000", # fpsr + "00000000", # fpcr + ] + + class MyResponder(MockGDBServerResponder): + def qXferRead(self, obj, annex, offset, length): + if annex == "target.xml": + return """<?xml version="1.0"?> + <!DOCTYPE feature SYSTEM "gdb-target.dtd"> + <target> + <architecture>aarch64</architecture> + <feature name="org.gnu.gdb.aarch64.core"> + <reg name="x0" bitsize="64" type="int" regnum="0"/> + <reg name="x1" bitsize="64" type="int" regnum="1"/> + <reg name="x2" bitsize="64" type="int" regnum="2"/> + <reg name="x3" bitsize="64" type="int" regnum="3"/> + <reg name="x4" bitsize="64" type="int" regnum="4"/> + <reg name="x5" bitsize="64" type="int" regnum="5"/> + <reg name="x6" bitsize="64" type="int" regnum="6"/> + <reg name="x7" bitsize="64" type="int" regnum="7"/> + <reg name="x8" bitsize="64" type="int" regnum="8"/> + <reg name="x9" bitsize="64" type="int" regnum="9"/> + <reg name="x10" bitsize="64" type="int" regnum="10"/> + <reg name="x11" bitsize="64" type="int" regnum="11"/> + <reg name="x12" bitsize="64" type="int" regnum="12"/> + <reg name="x13" bitsize="64" type="int" regnum="13"/> + <reg name="x14" bitsize="64" type="int" regnum="14"/> + <reg name="x15" bitsize="64" type="int" regnum="15"/> + <reg name="x16" bitsize="64" type="int" regnum="16"/> + <reg name="x17" bitsize="64" type="int" regnum="17"/> + <reg name="x18" bitsize="64" type="int" regnum="18"/> + <reg name="x19" bitsize="64" type="int" regnum="19"/> + <reg name="x20" bitsize="64" type="int" regnum="20"/> + <reg name="x21" bitsize="64" type="int" regnum="21"/> + <reg name="x22" bitsize="64" type="int" regnum="22"/> + <reg name="x23" bitsize="64" type="int" regnum="23"/> + <reg name="x24" bitsize="64" type="int" regnum="24"/> + <reg name="x25" bitsize="64" type="int" regnum="25"/> + <reg name="x26" bitsize="64" type="int" regnum="26"/> + <reg name="x27" bitsize="64" type="int" regnum="27"/> + <reg name="x28" bitsize="64" type="int" regnum="28"/> + <reg name="x29" bitsize="64" type="int" regnum="29"/> + <reg name="x30" bitsize="64" type="int" regnum="30"/> + <reg name="sp" bitsize="64" type="data_ptr" regnum="31"/> + <reg name="pc" bitsize="64" type="code_ptr" regnum="32"/> + <reg name="cpsr" bitsize="32" type="cpsr_flags" regnum="33"/> + </feature> + <feature name="org.gnu.gdb.aarch64.fpu"> + <reg name="v0" bitsize="128" type="aarch64v" regnum="34"/> + <reg name="v1" bitsize="128" type="aarch64v" regnum="35"/> + <reg name="v2" bitsize="128" type="aarch64v" regnum="36"/> + <reg name="v3" bitsize="128" type="aarch64v" regnum="37"/> + <reg name="v4" bitsize="128" type="aarch64v" regnum="38"/> + <reg name="v5" bitsize="128" type="aarch64v" regnum="39"/> + <reg name="v6" bitsize="128" type="aarch64v" regnum="40"/> + <reg name="v7" bitsize="128" type="aarch64v" regnum="41"/> + <reg name="v8" bitsize="128" type="aarch64v" regnum="42"/> + <reg name="v9" bitsize="128" type="aarch64v" regnum="43"/> + <reg name="v10" bitsize="128" type="aarch64v" regnum="44"/> + <reg name="v11" bitsize="128" type="aarch64v" regnum="45"/> + <reg name="v12" bitsize="128" type="aarch64v" regnum="46"/> + <reg name="v13" bitsize="128" type="aarch64v" regnum="47"/> + <reg name="v14" bitsize="128" type="aarch64v" regnum="48"/> + <reg name="v15" bitsize="128" type="aarch64v" regnum="49"/> + <reg name="v16" bitsize="128" type="aarch64v" regnum="50"/> + <reg name="v17" bitsize="128" type="aarch64v" regnum="51"/> + <reg name="v18" bitsize="128" type="aarch64v" regnum="52"/> + <reg name="v19" bitsize="128" type="aarch64v" regnum="53"/> + <reg name="v20" bitsize="128" type="aarch64v" regnum="54"/> + <reg name="v21" bitsize="128" type="aarch64v" regnum="55"/> + <reg name="v22" bitsize="128" type="aarch64v" regnum="56"/> + <reg name="v23" bitsize="128" type="aarch64v" regnum="57"/> + <reg name="v24" bitsize="128" type="aarch64v" regnum="58"/> + <reg name="v25" bitsize="128" type="aarch64v" regnum="59"/> + <reg name="v26" bitsize="128" type="aarch64v" regnum="60"/> + <reg name="v27" bitsize="128" type="aarch64v" regnum="61"/> + <reg name="v28" bitsize="128" type="aarch64v" regnum="62"/> + <reg name="v29" bitsize="128" type="aarch64v" regnum="63"/> + <reg name="v30" bitsize="128" type="aarch64v" regnum="64"/> + <reg name="v31" bitsize="128" type="aarch64v" regnum="65"/> + <reg name="fpsr" bitsize="32" type="int" regnum="66"/> + <reg name="fpcr" bitsize="32" type="int" regnum="67"/> + </feature> + </target>""", False + else: + return None, False + + def readRegister(self, regnum): + return "" + + def readRegisters(self): + return "".join(reg_data) + + def writeRegisters(self, reg_hex): + return "OK" + + def haltReason(self): + return "T02thread:1ff0d;threads:1ff0d;thread-pcs:000000010001bc00;07:0102030405060708;10:1112131415161718;" + + self.server.responder = MyResponder() + + target = self.createTarget("basic_eh_frame-aarch64.yaml") + process = self.connect(target) + lldbutil.expect_state_changes(self, self.dbg.GetListener(), process, + [lldb.eStateStopped]) + + # test GPRs + self.match("register read x0", + ["x0 = 0x0807060504030201"]) + self.match("register read x1", + ["x1 = 0x1817161514131211"]) + self.match("register read sp", + ["sp = 0x5857565554535251"]) + self.match("register read pc", + ["pc = 0x6867666564636261"]) + self.match("register read cpsr", + ["cpsr = 0x74737271"]) + + # test generic aliases + self.match("register read arg1", + ["x0 = 0x0807060504030201"]) + self.match("register read arg2", + ["x1 = 0x1817161514131211"]) + self.match("register read flags", + ["cpsr = 0x74737271"]) diff --git a/lldb/test/API/functionalities/gdb_remote_client/basic_eh_frame-i386.yaml b/lldb/test/API/functionalities/gdb_remote_client/basic_eh_frame-i386.yaml new file mode 100644 index 0000000000000..ca0c687af6410 --- /dev/null +++ b/lldb/test/API/functionalities/gdb_remote_client/basic_eh_frame-i386.yaml @@ -0,0 +1,47 @@ +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_EXEC + Machine: EM_386 + Entry: 0x00401000 +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + Address: 0x00401000 + AddressAlign: 0x00000001 + Content: C3 + - Name: .eh_frame + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC ] + Address: 0x00402000 + AddressAlign: 0x00000008 + Content: 1800000000000000017A5200017810011B0C070890010E80010000001000000020000000DCEFFFFF0100000000000000 +Symbols: + - Name: .text + Type: STT_SECTION + Section: .text + Value: 0x00401000 + - Name: .eh_frame + Type: STT_SECTION + Section: .eh_frame + Value: 0x00402000 + - Name: _start + Binding: STB_GLOBAL + - Name: __bss_start + Section: .eh_frame + Binding: STB_GLOBAL + Value: 0x00404000 + - Name: foo + Section: .text + Binding: STB_GLOBAL + Value: 0x00401000 + - Name: _edata + Section: .eh_frame + Binding: STB_GLOBAL + Value: 0x00404000 + - Name: _end + Section: .eh_frame + Binding: STB_GLOBAL + Value: 0x00404000 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
