================
@@ -229,3 +231,12 @@ Instruction *ArchitectureMips::GetInstructionAtAddress(
return nullptr;
}
+
+bool ArchitectureMips::IsValidBreakpointInstruction(
+ llvm::ArrayRef<uint8_t> reference, llvm::ArrayRef<uint8_t> observed) const
{
+ // The middle twenty bits of BREAK can be anything, so zero them
+ uint32_t mask = 0xFC00003F;
+ auto ref_bytes = llvm::support::endian::read32le(reference.data());
+ auto bytes = llvm::support::endian::read32le(observed.data());
+ return (ref_bytes & mask) == (bytes & mask);
+}
----------------
jasonmolenda wrote:
ftr we have ArchSpec entries for both BE and LE MIPS, either by core name
(ArchSpec::eCore_mips64 vrs. ArchSpec::eCore_mips64el) or by
`ArchSpec::GetDefaultEndian()`. But I agree this is not a currently exercised
target by anyone.
https://github.com/llvm/llvm-project/pull/174348
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