================
@@ -141,3 +143,18 @@ bool 
ArchitectureAArch64::ReconfigureRegisterInfo(DynamicRegisterInfo &reg_info,
 
   return true;
 }
+
+bool ArchitectureAArch64::IsValidBreakpointInstruction(
+    llvm::ArrayRef<uint8_t> reference, llvm::ArrayRef<uint8_t> observed) const 
{
+  if (reference.size() < 4 || observed.size() < 4)
+    return false;
+  auto ref_bytes = llvm::support::endian::read32le(reference.data());
+  auto bytes = llvm::support::endian::read32le(observed.data());
+  // Only the 11 highest bits define the breakpoint, the others include an
----------------
DuncanMcBain wrote:

I'm reading this from the ARM documentation 
([here](https://developer.arm.com/documentation/111182/2025-09_ASL1/Base-Instructions/BRK--Breakpoint-instruction-?lang=en)),
 but if it sounds wrong I will certainly defer to you! It doesn't really matter 
for the purposes of this code anyway so I've reworded the comment.

https://github.com/llvm/llvm-project/pull/174348
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