https://github.com/satyajanga updated https://github.com/llvm/llvm-project/pull/147434
>From d14ca454a5ec044a5cb0083327f5151aedbe20cc Mon Sep 17 00:00:00 2001 From: satya janga <satyaja...@fb.com> Date: Mon, 7 Jul 2025 17:20:50 -0700 Subject: [PATCH 1/2] Address gaps in RISCV function unwinding --- .../RISCV/EmulateInstructionRISCV.cpp | 20 +++++++++++++++++++ .../RISCV/EmulateInstructionRISCV.h | 11 ++++++---- 2 files changed, 27 insertions(+), 4 deletions(-) diff --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp index 2adde02aca3a1..90537587c0b23 100644 --- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp +++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp @@ -1899,4 +1899,24 @@ RISCVSingleStepBreakpointLocationsPredictor::HandleAtomicSequence( return bp_addrs; } +bool EmulateInstructionRISCV::CreateFunctionEntryUnwind( + UnwindPlan &unwind_plan) { + unwind_plan.Clear(); + unwind_plan.SetRegisterKind(eRegisterKindLLDB); + + UnwindPlan::Row row; + + // Our previous Call Frame Address is the stack pointer + row.GetCFAValue().SetIsRegisterPlusOffset(gpr_sp_riscv, 0); + row.SetRegisterLocationToSame(gpr_fp_riscv, /*must_replace=*/false); + + unwind_plan.AppendRow(std::move(row)); + unwind_plan.SetSourceName("EmulateInstructionRISCV"); + unwind_plan.SetSourcedFromCompiler(eLazyBoolNo); + unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolYes); + unwind_plan.SetUnwindPlanForSignalTrap(eLazyBoolNo); + unwind_plan.SetReturnAddressRegister(gpr_ra_riscv); + return true; +} + } // namespace lldb_private diff --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h index 3578a4ab03053..f5692efb03bd9 100644 --- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h +++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h @@ -57,11 +57,12 @@ class EmulateInstructionRISCV : public EmulateInstruction { static bool SupportsThisInstructionType(InstructionType inst_type) { switch (inst_type) { - case eInstructionTypeAny: - case eInstructionTypePCModifying: + case lldb_private::eInstructionTypeAny: + case lldb_private::eInstructionTypePrologueEpilogue: return true; - case eInstructionTypePrologueEpilogue: - case eInstructionTypeAll: + + case lldb_private::eInstructionTypePCModifying: + case lldb_private::eInstructionTypeAll: return false; } llvm_unreachable("Fully covered switch above!"); @@ -94,6 +95,8 @@ class EmulateInstructionRISCV : public EmulateInstruction { std::optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override; + bool CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) override; + std::optional<DecodeResult> ReadInstructionAt(lldb::addr_t addr); std::optional<DecodeResult> Decode(uint32_t inst); bool Execute(DecodeResult inst, bool ignore_cond); >From af707a0951a95ec99532b59db2f119a629089f28 Mon Sep 17 00:00:00 2001 From: satya janga <satyaja...@fb.com> Date: Sat, 12 Jul 2025 11:58:40 -0700 Subject: [PATCH 2/2] test commit --- lldb/source/Host/posix/MainLoopPosix.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lldb/source/Host/posix/MainLoopPosix.cpp b/lldb/source/Host/posix/MainLoopPosix.cpp index 19a7128fbe407..8e37dc3a6e9e8 100644 --- a/lldb/source/Host/posix/MainLoopPosix.cpp +++ b/lldb/source/Host/posix/MainLoopPosix.cpp @@ -217,7 +217,7 @@ MainLoopPosix::MainLoopPosix() { O_NONBLOCK); assert(result == 0); UNUSED_IF_ASSERT_DISABLED(result); - + // simple commit const int interrupt_pipe_fd = m_interrupt_pipe.GetReadFileDescriptor(); m_read_fds.insert( {interrupt_pipe_fd, [interrupt_pipe_fd](MainLoopBase &loop) { _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits