Hello Emil, On Wed, May 12, 2021 at 02:55:26AM +0200, Emil Lenngren wrote: > Well that's one way of "solving it" ;) > > But on what hardware do you really need to wait until one full pulse > cycle ends, before a disable command takes effect? > > On the hardware I've tested on (GR8 and V3s), it's enough to wait at > most two clock cycles in order for it to take effect before we can > close the gate. And with clock cycle I mean 24 MHz divided by the > prescaler. With prescaler 1, that's 84 nanoseconds. By closing the > gate when the pwm should be disabled, I guess we could save some > nanoampere or microampere (is this important?)
If I understood correctly you really have to wait longer to achieve that the output is inactive in the disabled state. Do you talk about the same thing? Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | https://www.pengutronix.de/ | -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20210512044133.6yfwyluzdx6yfh4c%40pengutronix.de.
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