Hello Roman, On Wed, Apr 28, 2021 at 02:19:46AM +0200, Roman Beranek wrote: > More often than not, a PWM period may span nowhere near as far > as 1 jiffy, yet it still must be waited upon before the channel > is disabled.
I wonder what happens if you don't wait long enough. Is this a theoretical issue, or do you see an (occasional?) breakage that is fixed by this patch? I guess the problem is that if you disable too early the output freezes and that might be in a state where the output is still active? Would polling the PWMx_RDY bit in the control register help here? Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | https://www.pengutronix.de/ | -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20210428061357.725m72aikc52n4gg%40pengutronix.de.
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