On 10/29/2025 5:20 AM, Sagi Shahar wrote:
[...]
+
+void vm_tdx_load_common_boot_parameters(struct kvm_vm *vm)
+{
+ struct td_boot_parameters *params =
+ addr_gpa2hva(vm, TD_BOOT_PARAMETERS_GPA);
+ uint32_t cr4;
+
+ TEST_ASSERT_EQ(vm->mode, VM_MODE_PXXV48_4K);
+
+ cr4 = kvm_get_default_cr4();
+
+ /* TDX spec 11.6.2: CR4 bit MCE is fixed to 1 */
+ cr4 |= X86_CR4_MCE;
+
+ /* TDX spec 11.6.2: CR4 bit VMXE and SMXE are fixed to 0 */
+ cr4 &= ~(X86_CR4_VMXE | X86_CR4_SMXE);
+
+ /* Set parameters! */
+ params->cr0 = kvm_get_default_cr0();
+ params->cr3 = vm->pgd;
Since TDX guest code starts from 32-bit, is it better to check that vm->pgd is
not beyond 32-bit?
+ params->cr4 = cr4;
+ params->idtr.base = vm->arch.idt;
+ params->idtr.limit = kvm_get_default_idt_limit();
+ params->gdtr.base = vm->arch.gdt;
+ params->gdtr.limit = kvm_get_default_gdt_limit();
+
+ TEST_ASSERT(params->cr0 != 0, "cr0 should not be 0");
+ TEST_ASSERT(params->cr3 != 0, "cr3 should not be 0");
+ TEST_ASSERT(params->cr4 != 0, "cr4 should not be 0");
+ TEST_ASSERT(params->gdtr.base != 0, "gdt base address should not be 0");
+ TEST_ASSERT(params->idtr.base != 0, "idt base address should not be 0");
+}
+
[...]
