On Wed, Oct 15, 2025, Sean Christopherson wrote:
> On Wed, Sep 17, 2025, Jim Mattson wrote:
> > Add a new VM mode, VM_MODE_PXXV57_4K, to support tests that require
> > 5-level paging on x86. This mode sets up a 57-bit virtual address
> > space and sets CR4.LA57 in the guest.
Thinking about this more, unless it's _really_ painful, e.g. because tests
assume
4-level paging or 48-bit non-canonical address, I would rather turn
VM_MODE_PXXV48_4K
into VM_MODE_PXXVXX_4K and have ____vm_create() create the "maximal" VM. That
way tests don't need to go out of their way just to use 5-level paging, e.g. a
"TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_LA57))" is all that is needed. It will
also
gives quite a bit of coverage for free, e.g. that save/restore works with and
without 5-level paging (contrived example, but you get the point).
The NONCANONICAL #define works for LA57, so hopefully making tests play nice
with
LA57 is straightforward?
> > @@ -358,6 +360,25 @@ struct kvm_vm *____vm_create(struct vm_shape shape)
> > vm->va_bits = 48;
> > #else
> > TEST_FAIL("VM_MODE_PXXV48_4K not supported on non-x86
> > platforms");
> > +#endif
> > + break;
> > + case VM_MODE_PXXV57_4K:
> > +#ifdef __x86_64__
> > + kvm_get_cpu_address_width(&vm->pa_bits, &vm->va_bits);
> > + kvm_init_vm_address_properties(vm);
> > + /*
> > + * For 5-level paging, KVM requires LA57 to be enabled, which
> > + * requires a 57-bit virtual address space.
> > + */
> > + TEST_ASSERT(vm->va_bits == 57,
> > + "Linear address width (%d bits) not supported for
> > VM_MODE_PXXV57_4K",
> > + vm->va_bits);
> > + pr_debug("Guest physical address width detected: %d\n",
> > + vm->pa_bits);
> > + vm->pgtable_levels = 5;
> > + vm->va_bits = 57;
> > +#else
> > + TEST_FAIL("VM_MODE_PXXV57_4K not supported on non-x86
> > platforms");
> > #endif
>
> That's a lot of copy+paste, especially given the #ifdefs. How about this
> (untested)?
>
> case VM_MODE_PXXV48_4K:
> case VM_MODE_PXXV57_4K:
> #ifdef __x86_64__
> kvm_get_cpu_address_width(&vm->pa_bits, &vm->va_bits);
> kvm_init_vm_address_properties(vm);
>
> /*
> * Ignore KVM support for 5-level paging (vm->va_bits == 57) if
> * the target mode is 4-level paging (48-bit virtual address
> * space), as 5-level paging only takes effect if CR4.LA57=1.
> */
> TEST_ASSERT(vm->va_bits == 57 ||
> (vm->va_bits == 48 && vm->mode ==
> VM_MODE_PXXV48_4K),
> "Linear address width (%d bits) not supported",
> vm->va_bits);
> pr_debug("Guest physical address width detected: %d\n",
> vm->pa_bits);
> if (vm->mode == VM_MODE_PXXV48_4K) {
> vm->pgtable_levels = 4;
> vm->va_bits = 48;
> } else {
> vm->pgtable_levels = 5;
> vm->va_bits = 57;
> }
> #else
> TEST_FAIL("VM_MODE_PXXV{48,57}_4K not supported on non-x86
> platforms");
> #endif
> break;
