On 7/9/20 1:12 AM, Xu Yilun wrote: > From: Matthew Gerlach <[email protected]> > > When putting the port in reset, driver must wait for the soft reset > acknowledgment bit instead of the soft reset bit. > > Fixes: 47c1b19c160f (fpga: dfl: afu: add port ops support) > Signed-off-by: Matthew Gerlach <[email protected]> > Signed-off-by: Xu Yilun <[email protected]> > Acked-by: Wu Hao <[email protected]> > --- > drivers/fpga/dfl-afu-main.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c > index 7c84fee..753cda4 100644 > --- a/drivers/fpga/dfl-afu-main.c > +++ b/drivers/fpga/dfl-afu-main.c > @@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev) > * on this port and minimum soft reset pulse width has elapsed. > * Driver polls port_soft_reset_ack to determine if reset done by HW. > */ > - if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST, > + if (readq_poll_timeout(base + PORT_HDR_CTRL, v, > + v & PORT_CTRL_SFTRST_ACK, > RST_POLL_INVL, RST_POLL_TIMEOUT)) { > dev_err(&pdev->dev, "timeout, fail to reset device\n"); > return -ETIMEDOUT;
Looks ok to me. Reviewed-by: Tom Rix <[email protected]>
