On Wed, Oct 02, 2019 at 08:04:55AM +0200, Lukasz Luba wrote: > Introduce a new interrupt driven mechanism for managing speed of the > memory controller. The interrupts are generated due to performance > counters overflow. The performance counters might track memory reads, > writes, transfers, page misses, etc. In the basic algorithm tracking > read transfers and calculating memory pressure should be enough to > skip polling mode in devfreq. > > Signed-off-by: Lukasz Luba <[email protected]> > --- > drivers/memory/samsung/exynos5422-dmc.c | 345 ++++++++++++++++++++++--
Thanks, applied. Best regards, Krzysztof
