On 06/30, Varadarajan Narayanan wrote:
> diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi 
> b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> index b9457dd..b74c113 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> @@ -20,26 +20,7 @@
>       model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
>       compatible = "qcom,ipq4019";
>  
> -     clocks {
> -                xo: xo {
> -                        compatible = "fixed-clock";
> -                        clock-frequency = <48000000>;
> -                        #clock-cells = <0>;
> -                };
> -     };
> -
>       soc {
> -
> -
> -             timer {
> -                     compatible = "arm,armv7-timer";
> -                     interrupts = <1 2 0xf08>,
> -                                  <1 3 0xf08>,
> -                                  <1 4 0xf08>,
> -                                  <1 1 0xf08>;
> -                     clock-frequency = <48000000>;
> -             };
> -
>               pinctrl@0x01000000 {

This should be pinctrl@1000000 { and fixed in another patch.


>                       serial_pins: serial_pinmux {
>                               mux {
> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi 
> b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> index b7a24af..e8ab1e1 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> @@ -96,6 +96,11 @@
>                       clock-frequency = <32768>;
>                       #clock-cells = <0>;
>               };
> +             xo: xo {

Please add a newline so it isn't right next to the previous node.

> +                     compatible = "fixed-clock";
> +                     clock-frequency = <48000000>;
> +                     #clock-cells = <0>;
> +             };
>       };
>  
>       soc {
> @@ -104,6 +109,15 @@
>               ranges;
>               compatible = "simple-bus";
>  
> +             timer {
> +                     compatible = "arm,armv7-timer";
> +                     interrupts = <1 2 0xf08>,
> +                                  <1 3 0xf08>,
> +                                  <1 4 0xf08>,
> +                                  <1 1 0xf08>;
> +                     clock-frequency = <48000000>;
> +             };

This should be outside of the soc node.

> +
>               intc: interrupt-controller@b000000 {
>                       compatible = "qcom,msm-qgic2";
>                       interrupt-controller;

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