Partial reconfiguration of the programmable logic restores the AXI GPIO
that drives the soft-core reset to its hardware default direction, but
gpiolib keeps its cached output direction. gpiod_set_value_cansleep()
then only updates the data register, so the processor never sees a
reset transition: remoteproc reports it as running while the newly
loaded firmware never starts.

Use gpiod_direction_output() for every reset transition so the output
direction is re-established, and assert reset briefly before releasing
it so each start produces a clean reset pulse after the firmware has
been loaded.

Fixes: f87b4998994e ("remoteproc: Add AMD MicroBlaze/V BRAM-based remote 
processor driver")
Assisted-by: LLM sparse
Signed-off-by: Ben Levinsky <[email protected]>
---
 drivers/remoteproc/amd_mbv_bram_rproc.c | 23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/drivers/remoteproc/amd_mbv_bram_rproc.c 
b/drivers/remoteproc/amd_mbv_bram_rproc.c
index 6cf33c7b7e64..da621f62f7df 100644
--- a/drivers/remoteproc/amd_mbv_bram_rproc.c
+++ b/drivers/remoteproc/amd_mbv_bram_rproc.c
@@ -16,6 +16,7 @@
  */
 
 #include <linux/clk.h>
+#include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/gpio/consumer.h>
 #include <linux/module.h>
@@ -94,8 +95,24 @@ static int amd_bram_rproc_start(struct rproc *rproc)
                return ret;
        }
 
+       /*
+        * Partial reconfiguration restores the PL GPIO hardware defaults but
+        * leaves gpiolib's cached direction unchanged. Re-establish the output
+        * direction and generate a reset pulse after firmware has been loaded.
+        * gpiod_set_value_cansleep() is insufficient here because it changes 
the
+        * value without restoring an output direction lost during DFX.
+        */
+       ret = gpiod_direction_output(priv->reset, 1);
+       if (ret) {
+               dev_err(priv->dev, "failed to assert reset: %d\n", ret);
+               clk_disable_unprepare(priv->clk);
+               return ret;
+       }
+       /* Hold reset asserted long enough to provide a clean reset pulse. */
+       usleep_range(10, 20);
+
        /* Deassert reset and let the processor run. */
-       ret = gpiod_set_value_cansleep(priv->reset, 0);
+       ret = gpiod_direction_output(priv->reset, 0);
        if (ret) {
                dev_err(priv->dev, "failed to deassert reset: %d\n", ret);
                clk_disable_unprepare(priv->clk);
@@ -110,8 +127,8 @@ static int amd_bram_rproc_stop(struct rproc *rproc)
        struct amd_bram_rproc *priv = rproc->priv;
        int ret;
 
-       /* Assert reset before disabling the processor clock. */
-       ret = gpiod_set_value_cansleep(priv->reset, 1);
+       /* Restore the output direction after DFX and assert reset. */
+       ret = gpiod_direction_output(priv->reset, 1);
        if (ret) {
                dev_err(priv->dev, "failed to assert reset: %d\n", ret);
                return ret;
-- 
2.34.1


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