On Thu, Apr 15, 2021 at 01:08:09PM -0500, Brijesh Singh wrote:
> This is from Family 19h Model 01h Rev B01. The processor which
> introduces the SNP feature. Yes, I have already upload the PPR on the BZ.
>
> The PPR is also available at AMD: https://www.amd.com/en/support/tech-docs
Please add the link in the bugzilla to the comments here - this is the
reason why stuff is being uploaded in the first place, because those
vendor sites tend to change and those links become stale with time.
> I guess I was trying to shorten the name. I am good with struct rmpentry;
Yes please - typedefs are used only in very specific cases.
> All those magic numbers are documented in the PPR.
We use defines - not magic numbers. For example
#define RMPTABLE_ENTRIES_OFFSET 0x4000
The 8 is probably
PAGE_SHIFT - RMPENTRY_SHIFT
because you have GPA bits [50:12] and an RMP entry is 16 bytes, i.e., 1 << 4.
With defines it is actually clear what the computation is doing - with
naked numbers not really.
> APM does not provide the offset of the entry inside the RMP table.
It does, kinda, but in the pseudocode of those new insns in APM v3. From
PVALIDATE pseudo:
RMP_ENTRY_PA = RMP_BASE + 0x4000 + (SYSTEM_PA / 0x1000) * 16
and that last
/ 0x1000 * 16
is actually
>> 12 - 4
i.e., the >> 8 shift.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
