On Mon, Jan 07, 2019 at 08:56:07AM -0800, Eric Biggers wrote:
> Hi Kalyani,
>
> On Mon, Jan 07, 2019 at 02:32:55PM +0530, Kalyani Akula wrote:
> > This patch adds SHA3 driver suuport for the Xilinx
> > ZynqMP SoC.
> >
> > Signed-off-by: Kalyani Akula <kalyani.ak...@xilinx.com>
> [...]
> > +
> > +static struct ahash_alg sha3_alg = {
> > + .init = zynqmp_sha_init,
> > + .update = zynqmp_sha_update,
> > + .final = zynqmp_sha_final,
> > + .finup = zynqmp_sha_finup,
> > + .digest = zynqmp_sha_digest,
> > + .export = zynqmp_sha_export,
> > + .import = zynqmp_sha_import,
> > + .halg = {
> > + .digestsize = SHA384_DIGEST_SIZE,
> > + .statesize = sizeof(struct sha256_state),
> > + .base = {
> > + .cra_name = "xilinx-keccak-384",
> > + .cra_driver_name = "zynqmp-keccak-384",
> > + .cra_priority = 300,
> > + .cra_flags = CRYPTO_ALG_ASYNC,
> > + .cra_blocksize = SHA384_BLOCK_SIZE,
> > + .cra_ctxsize = sizeof(struct zynqmp_sha_ctx),
> > + .cra_alignmask = 0,
> > + .cra_module = THIS_MODULE,
> > + .cra_init = zynqmp_sha_cra_init,
> > + }
> > + }
> > +};
>
> cra_name needs to match an algorithm that has a generic implementation.
> It should be "sha3-384", or is your hardware not compatible?
> Also does your hardware not support sha3-256 and sha3-512?
>
> - Eric
Hi Kalyani, this was not addressed in v2.
- Eric
