> -----Original Message-----
> From: Intel-xe <[email protected]> On Behalf Of Maarten
> Lankhorst
> Sent: Wednesday, January 21, 2026 7:23 PM
> To: [email protected]; [email protected]
> Cc: Maarten Lankhorst <[email protected]>; Sebastian Andrzej Siewior
> <[email protected]>
> Subject: [i915-rt v5 04/21] drm/i915/display: Make set_pipeconf use the fw
> variants
> 
> The calls are used inside the critical section when updating the gamma mode, 
> and
> thus should use the _fw variants to prevent locks.

Looks good to me, but limit it to RT.

> Fixes following splat:
> | BUG: sleeping function called from invalid context at
> | kernel/locking/spinlock_rt.c:48
> | in_atomic(): 0, irqs_disabled(): 1, non_block: 0, pid: 2115, name:
> | modprobe
> | preempt_count: 0, expected: 0
> | RCU nest depth: 0, expected: 0
> | 4 locks held by modprobe/2115:
> |  #0: ffff99b9425161a0 (&dev->mutex){....}-{4:4}, at:
> | __driver_attach+0xaf/0x1c0
> |  #1: ffffaa224810f6c0 (crtc_ww_class_acquire){+.+.}-{0:0}, at:
> | intel_initial_commit+0x4c/0x200 [i915]
> |  #2: ffffaa224810f6e8 (crtc_ww_class_mutex){+.+.}-{4:4}, at:
> | intel_initial_commit+0x4c/0x200 [i915]
> |  #3: ffff99b94a6c9030 (&uncore->lock){+.+.}-{3:3}, at:
> | gen6_write32+0x50/0x290 [i915] irq event stamp: 513344 hardirqs last
> | enabled at (513343): [<ffffffff8ba8d84c>]
> | _raw_spin_unlock_irqrestore+0x4c/0x60
> | hardirqs last disabled at (513344): [<ffffffffc1543646>]
> | intel_pipe_update_start+0x216/0x2c0 [i915] softirqs last  enabled at
> | (512766): [<ffffffff8af045cf>] __local_bh_enable_ip+0x10f/0x170 softirqs 
> last
> disabled at (512712): [<ffffffffc14dfb6a>] __i915_request_queue+0x3a/0x70 
> [i915]
> | CPU: 3 UID: 0 PID: 2115 Comm: modprobe Tainted: G        W           
> 6.18.0-rc1+
> #17 PREEMPT_{RT,(lazy)}
> | Tainted: [W]=WARN
> | Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./Z68
> | Pro3-M, BIOS P2.30 06/29/2012 Call Trace:
> |  <TASK>
> |  dump_stack_lvl+0x68/0x90
> |  __might_resched.cold+0xf0/0x12b
> |  rt_spin_lock+0x5f/0x200
> |  gen6_write32+0x50/0x290 [i915]
> |  ilk_set_pipeconf+0x12d/0x230 [i915]
> |  ilk_color_commit_arm+0x2d/0x70 [i915]
> |  intel_update_crtc+0x15b/0x690 [i915]
> |  intel_commit_modeset_enables+0xa6/0xd0 [i915]
> |  intel_atomic_commit_tail+0xd55/0x19a0 [i915]
> |  intel_atomic_commit+0x25d/0x2a0 [i915]
> |  drm_atomic_commit+0xad/0xe0 [drm]
> |  intel_initial_commit+0x16c/0x200 [i915]
> |  intel_display_driver_probe+0x2e/0x80 [i915]
> |  i915_driver_probe+0x791/0xc10 [i915]
> |  i915_pci_probe+0xd7/0x190 [i915]
> 
> Reported-by: Sebastian Andrzej Siewior <[email protected]>
> Signed-off-by: Maarten Lankhorst <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d721a72072300..bf37511f9ab21 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3013,8 +3013,9 @@ void i9xx_set_pipeconf(const struct intel_crtc_state
> *crtc_state)
> 
>       val |= TRANSCONF_FRAME_START_DELAY(crtc_state-
> >framestart_delay - 1);
> 
> -     intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
> -     intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
> +     intel_de_write_fw(display, TRANSCONF(display, cpu_transcoder), val);
> +     /* posting read */
> +     intel_de_read_fw(display, TRANSCONF(display, cpu_transcoder));
>  }
> 
>  static enum intel_output_format
> @@ -3209,8 +3210,9 @@ void ilk_set_pipeconf(const struct intel_crtc_state
> *crtc_state)
>       val |= TRANSCONF_FRAME_START_DELAY(crtc_state-
> >framestart_delay - 1);
>       val |= TRANSCONF_MSA_TIMING_DELAY(crtc_state-
> >msa_timing_delay);
> 
> -     intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
> -     intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
> +     intel_de_write_fw(display, TRANSCONF(display, cpu_transcoder), val);
> +     /* posting read */
> +     intel_de_read_fw(display, TRANSCONF(display, cpu_transcoder));
>  }
> 
>  static void hsw_set_transconf(const struct intel_crtc_state *crtc_state)
> --
> 2.51.0

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