On Mon, 2025-05-12 at 13:33 +0300, Ville Syrjala wrote: > From: Ville Syrjälä <[email protected]> > > Move is_dmc_evt_ctl_reg() to a slightly earlier position in the file > so that we can reuse it in the pkgc workaround code. Also move > is_dmc_evt_htp_reg() just to keep the two together. > > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dmc.c | 40 ++++++++++++------------ > 1 file changed, 20 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c > b/drivers/gpu/drm/i915/display/intel_dmc.c > index ec940f837427..238f3cda400c 100644 > --- a/drivers/gpu/drm/i915/display/intel_dmc.c > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c > @@ -544,6 +544,26 @@ static u32 dmc_evt_ctl_disable(void) > DMC_EVENT_FALSE); > } > > +static bool is_dmc_evt_ctl_reg(struct intel_display *display, > + enum intel_dmc_id dmc_id, i915_reg_t reg) > +{ > + u32 offset = i915_mmio_reg_offset(reg); > + u32 start = i915_mmio_reg_offset(DMC_EVT_CTL(display, dmc_id, 0)); > + u32 end = i915_mmio_reg_offset(DMC_EVT_CTL(display, dmc_id, > DMC_EVENT_HANDLER_COUNT_GEN12)); > + > + return offset >= start && offset < end; > +} > + > +static bool is_dmc_evt_htp_reg(struct intel_display *display, > + enum intel_dmc_id dmc_id, i915_reg_t reg) > +{ > + u32 offset = i915_mmio_reg_offset(reg); > + u32 start = i915_mmio_reg_offset(DMC_EVT_HTP(display, dmc_id, 0)); > + u32 end = i915_mmio_reg_offset(DMC_EVT_HTP(display, dmc_id, > DMC_EVENT_HANDLER_COUNT_GEN12)); > + > + return offset >= start && offset < end; > +} > + > /** > * intel_dmc_block_pkgc() - block PKG C-state > * @display: display instance > @@ -589,26 +609,6 @@ void > intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblank(struct intel_display > val); > } > > -static bool is_dmc_evt_ctl_reg(struct intel_display *display, > - enum intel_dmc_id dmc_id, i915_reg_t reg) > -{ > - u32 offset = i915_mmio_reg_offset(reg); > - u32 start = i915_mmio_reg_offset(DMC_EVT_CTL(display, dmc_id, 0)); > - u32 end = i915_mmio_reg_offset(DMC_EVT_CTL(display, dmc_id, > DMC_EVENT_HANDLER_COUNT_GEN12)); > - > - return offset >= start && offset < end; > -} > - > -static bool is_dmc_evt_htp_reg(struct intel_display *display, > - enum intel_dmc_id dmc_id, i915_reg_t reg) > -{ > - u32 offset = i915_mmio_reg_offset(reg); > - u32 start = i915_mmio_reg_offset(DMC_EVT_HTP(display, dmc_id, 0)); > - u32 end = i915_mmio_reg_offset(DMC_EVT_HTP(display, dmc_id, > DMC_EVENT_HANDLER_COUNT_GEN12)); > - > - return offset >= start && offset < end; > -} > - > static bool disable_dmc_evt(struct intel_display *display, > enum intel_dmc_id dmc_id, > i915_reg_t reg, u32 data)
Reviewed-by: Luca Coelho <[email protected]> -- Cheers. Luca.
