On Wed, 2025-04-09 at 13:30 +0530, Nautiyal, Ankit K wrote: > > On 4/9/2025 11:19 AM, Jouni Högander wrote: > > According to Bspec VRR_CTL_IGN_MAX_SHIFT doesn't exist for MTL and > > onwards. On LunarLake and onwards Bit 30 is "Mask Block PkgC" > > instead. Stop > > writing the bit for MeteorLake and onwards > > > > v2: "Ignore Max Shift" bit doesn't exist on MeteorLake either > > > > Bspec: 68925 > > Perhaps you can add 50508 or 71956 for MTL. > > Reviewed-by: Ankit Nautiyal <[email protected]>
This is now pushed to drm-intel-next. Thank you for checking my patch. BR, Jouni Högander > > > > Signed-off-by: Jouni Högander <[email protected]> > > --- > > drivers/gpu/drm/i915/display/intel_vrr.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c > > b/drivers/gpu/drm/i915/display/intel_vrr.c > > index 633a66f6b73b..c6565baf815a 100644 > > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > > @@ -444,7 +444,10 @@ static u32 trans_vrr_ctl(const struct > > intel_crtc_state *crtc_state) > > { > > struct intel_display *display = > > to_intel_display(crtc_state); > > > > - if (DISPLAY_VER(display) >= 13) > > + if (DISPLAY_VER(display) >= 14) > > + return VRR_CTL_FLIP_LINE_EN | > > + XELPD_VRR_CTL_VRR_GUARDBAND(crtc_state- > > >vrr.guardband); > > + else if (DISPLAY_VER(display) >= 13) > > return VRR_CTL_IGN_MAX_SHIFT | > > VRR_CTL_FLIP_LINE_EN | > > XELPD_VRR_CTL_VRR_GUARDBAND(crtc_state- > > >vrr.guardband); > > else
