RE: [PATCH 6/6] drm/i915/wm: Modify latency programmed into PKG_C_LATENCY

Tue, 03 Dec 2024 00:15:15 -0800 


> -----Original Message-----
> From: Intel-gfx <[email protected]> On Behalf Of Suraj
> Kandpal
> Sent: 15 November 2024 21:31
> To: [email protected]; [email protected]
> Cc: Govindapillai, Vinod <[email protected]>; Nikula, Jani
> <[email protected]>; Kandpal, Suraj <[email protected]>
> Subject: [PATCH 6/6] drm/i915/wm: Modify latency programmed into
> PKG_C_LATENCY
> 
> Increase the latency programmed into PKG_C_LATENCY latency to be a
> multiple of line time which is written into WM_LINETIME.
> 
> --v2
> -Fix commit subject line [Sai Teja]
> -Use individual DISPLAY_VER checks instead of range [Sai Teja] -Initialize
> max_linetime [Sai Teja]
> 
> --v3
> -take into account the scenario when adjusted_latency is 0 [Vinod]
> 
> --v4
> -rename adjusted_latency to latency [Mitul] -fix the condition in which dpkgc
> is disabled [Vinod]
> 
> --v5
> -Add check to see if max_linetime is 0 [Vinod]
> 
> WA: 22020299601
> Signed-off-by: Suraj Kandpal <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 20 +++++++++++++++-----
>  1 file changed, 15 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 0cc843314358..e9a60d54afef 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2861,7 +2861,7 @@ intel_program_dpkgc_latency(struct
> intel_atomic_state *state)
>       struct drm_i915_private *i915 = to_i915(display->drm);
>       struct intel_crtc *crtc;
>       struct intel_crtc_state *new_crtc_state;
> -     u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time =
> 0;
> +     u32 latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0,
> +max_linetime = 0;
>       u32 clear, val;
>       bool fixed_refresh_rate = false;
>       int i;
> @@ -2874,18 +2874,28 @@ intel_program_dpkgc_latency(struct
> intel_atomic_state *state)
>                   (new_crtc_state->vrr.vmin == new_crtc_state->vrr.vmax
> &&
>                    new_crtc_state->vrr.vmin == new_crtc_state->vrr.flipline))
>                       fixed_refresh_rate = true;
> +
> +             max_linetime = max(new_crtc_state->linetime,
> max_linetime);
>       }
> 
>       if (fixed_refresh_rate) {
> -             max_latency = skl_watermark_max_latency(i915, 1);
> -             if (max_latency == 0)
> -                     max_latency = LNL_PKG_C_LATENCY_MASK;
> +             latency = skl_watermark_max_latency(i915, 1);
> +             /* Wa_22020299601 */
> +             if (latency) {
> +                     if ((DISPLAY_VER(display) == 20 ||
> DISPLAY_VER(display) == 30) &&
> +                         max_linetime)
> +                             latency = max_linetime *
> +                                     DIV_ROUND_UP(latency,
> max_linetime);
> +             } else {
> +                     latency = LNL_PKG_C_LATENCY_MASK;
> +             }
> +

Can this help, to avoid nested conditions ?

if (fixed_refresh_rate) {
                latency = skl_watermark_max_latency(i915, 1);

                /* Wa_22020299601*/
                if (latency && max_linetime && (DISPLAY_VER(display) == 20 || 
DISPLAY_VER(display) == 30)) {
                        latency = max_linetime * DIV_ROUND_UP(latency, 
max_linetime);
                } else if (!latency) {
                        latency = LNL_PKG_C_LATENCY_MASK;
                }

>               added_wake_time = DSB_EXE_TIME +
>                       display->sagv.block_time_us;
>       }
> 
>       clear = LNL_ADDED_WAKE_TIME_MASK |
> LNL_PKG_C_LATENCY_MASK;
> -     val = REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency) |
> +     val = REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, latency) |
>               REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK,
> added_wake_time);
> 
>       intel_de_rmw(display, LNL_PKG_C_LATENCY, clear, val);
> --
> 2.34.1
























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