> -----Original Message-----
> From: Golani, Mitulkumar Ajitkumar
> <[email protected]>
> Sent: Monday, December 2, 2024 3:04 PM
> To: Kandpal, Suraj <[email protected]>; [email protected];
> [email protected]
> Cc: Govindapillai, Vinod <[email protected]>; Nikula, Jani
> <[email protected]>
> Subject: RE: [PATCH 3/6] drm/i915/wm: Rename enable_dpkgc variable
>
>
>
> > -----Original Message-----
> > From: Intel-gfx <[email protected]> On Behalf Of
> > Suraj Kandpal
> > Sent: 15 November 2024 21:31
> > To: [email protected]; [email protected]
> > Cc: Govindapillai, Vinod <[email protected]>; Nikula, Jani
> > <[email protected]>; Kandpal, Suraj <[email protected]>
> > Subject: [PATCH 3/6] drm/i915/wm: Rename enable_dpkgc variable
> >
> > Rename the enable_dpkgc variable to make it more clear what it
> > represents which is that if we are in fixed refresh rate or not.
>
> Changing names for the sake to this function doesn't make any sense to me
> here, can be dropped if not required.
On second though this whole patch can be dropped altogether since after a
little moving around in patches later it really does not make any sense to have
this change
Regards,
Suraj Kandpal
> >
> > Signed-off-by: Suraj Kandpal <[email protected]>
> > ---
> > drivers/gpu/drm/i915/display/skl_watermark.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> > b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index 6d5f64ed52ed..9ce3b5580df4 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -2855,7 +2855,8 @@ static int skl_wm_add_affected_planes(struct
> > intel_atomic_state *state,
> > * Program PKG_C_LATENCY Added Wake Time = 0
> > */
> > static void
> > -skl_program_dpkgc_latency(struct drm_i915_private *i915, bool
> > enable_dpkgc)
> > +skl_program_dpkgc_latency(struct drm_i915_private *i915,
> > + bool fixed_refresh_rate)
> > {
> > u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time =
> 0;
> > u32 clear, val;
> > @@ -2863,7 +2864,7 @@ skl_program_dpkgc_latency(struct
> > drm_i915_private *i915, bool enable_dpkgc)
> > if (DISPLAY_VER(i915) < 20)
> > return;
> >
> > - if (enable_dpkgc) {
> > + if (fixed_refresh_rate) {
> > max_latency = skl_watermark_max_latency(i915, 1);
> > if (max_latency == 0)
> > max_latency = LNL_PKG_C_LATENCY_MASK;
> > --
> > 2.34.1
