Move helper to retrieve the compressed and uncompressed joiner pipes from dss ctl to intel_dss files.
v2: Derive intel_display from crtc. (Jani) Signed-off-by: Ankit Nautiyal <[email protected]> --- drivers/gpu/drm/i915/display/intel_display.c | 34 +++----------- drivers/gpu/drm/i915/display/intel_dss.c | 48 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dss.h | 7 +++ 3 files changed, 61 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 05ffd28cc16a..3d7990f8f20f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3545,35 +3545,13 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, joiner_pipes(dev_priv)) { - enum intel_display_power_domain power_domain; - enum pipe pipe = crtc->pipe; - intel_wakeref_t wakeref; - - power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe); - with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) { - u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe)); + intel_dss_get_compressed_joiner_pipes(crtc, + primary_pipes, + secondary_pipes); - if (!(tmp & BIG_JOINER_ENABLE)) - continue; - - if (tmp & PRIMARY_BIG_JOINER_ENABLE) - *primary_pipes |= BIT(pipe); - else - *secondary_pipes |= BIT(pipe); - } - - if (DISPLAY_VER(dev_priv) < 13) - continue; - - power_domain = POWER_DOMAIN_PIPE(pipe); - with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) { - u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe)); - - if (tmp & UNCOMPRESSED_JOINER_PRIMARY) - *primary_pipes |= BIT(pipe); - if (tmp & UNCOMPRESSED_JOINER_SECONDARY) - *secondary_pipes |= BIT(pipe); - } + intel_dss_get_uncompressed_joiner_pipes(crtc, + primary_pipes, + secondary_pipes); } /* Joiner pipes should always be consecutive primary and secondary */ diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c index fe55f4b1a9bf..01303feadcef 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.c +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -217,3 +217,51 @@ void intel_dss_dsc_get_config(struct intel_crtc_state *crtc_state) crtc_state->dsc.dsc_split = (dss_ctl2 & RIGHT_BRANCH_VDSC_ENABLE) && (dss_ctl1 & JOINER_ENABLE); } + +void intel_dss_get_compressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes) +{ + struct intel_display *display = to_intel_display(crtc); + struct drm_i915_private *i915 = to_i915(display->drm); + enum intel_display_power_domain power_domain; + enum pipe pipe = crtc->pipe; + intel_wakeref_t wakeref; + + power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe); + with_intel_display_power_if_enabled(i915, power_domain, wakeref) { + u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe)); + + if (!(tmp & BIG_JOINER_ENABLE)) + continue; + + if (tmp & PRIMARY_BIG_JOINER_ENABLE) + *primary_pipes |= BIT(pipe); + else + *secondary_pipes |= BIT(pipe); + } +} + +void intel_dss_get_uncompressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes) +{ + struct intel_display *display = to_intel_display(crtc); + struct drm_i915_private *i915 = to_i915(display->drm); + enum intel_display_power_domain power_domain; + enum pipe pipe = crtc->pipe; + intel_wakeref_t wakeref; + + if (DISPLAY_VER(display) < 13) + return; + + power_domain = POWER_DOMAIN_PIPE(pipe); + with_intel_display_power_if_enabled(i915, power_domain, wakeref) { + u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe)); + + if (tmp & UNCOMPRESSED_JOINER_PRIMARY) + *primary_pipes |= BIT(pipe); + if (tmp & UNCOMPRESSED_JOINER_SECONDARY) + *secondary_pipes |= BIT(pipe); + } +} diff --git a/drivers/gpu/drm/i915/display/intel_dss.h b/drivers/gpu/drm/i915/display/intel_dss.h index cb204db56153..6a74404bd76d 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.h +++ b/drivers/gpu/drm/i915/display/intel_dss.h @@ -11,6 +11,7 @@ struct intel_crtc_state; struct intel_display; struct intel_encoder; +struct intel_crtc; u8 intel_dss_mso_pipe_mask(struct intel_display *display); void intel_dss_mso_get_config(struct intel_encoder *encoder, @@ -24,6 +25,12 @@ void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_st void intel_dss_enable_compressed_joiner(const struct intel_crtc_state *crtc_state, int vdsc_instances_per_pipe); void intel_dss_dsc_get_config(struct intel_crtc_state *crtc_state); +void intel_dss_get_compressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes); +void intel_dss_get_uncompressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes); #endif /* __INTEL_DSS_H__ */ -- 2.45.2
