: RE: [PATCH v2] drm/i915/display: Increase AUX timeout for Type-C
>
> > -----Original Message-----
> > From: Kandpal, Suraj <[email protected]>
> > Sent: Wednesday, April 5, 2023 12:50 PM
> > To: [email protected]
> > Cc: Murthy, Arun R <[email protected]>; Sharma, Swati2
> > <[email protected]>; Kandpal, Suraj <[email protected]>
> > Subject: [PATCH v2] drm/i915/display: Increase AUX timeout for Type-C
> >
> > Type-C PHYs are taking longer than expected for Aux IO Power Enabling.
> > Workaround: Increase the timeout.
> >
> > WA_14017248603: adlp
> > Bspec: 55480
> >
> > ---v2
> > -change style on how we mention WA [Ankit] -fix bat error
> >
> > Signed-off-by: Suraj Kandpal <[email protected]>
> > ---
> > .../i915/display/intel_display_power_well.c | 30 ++++++++++++++++++-
> > 1 file changed, 29 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > index 62bafcbc7937..52f595929a18 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > @@ -489,6 +489,34 @@ static void icl_tc_cold_exit(struct
> > drm_i915_private
> > *i915)
> > "succeeded");
> > }
> >
> > +static void
> > +adl_aux_wait_for_power_well_enable(struct drm_i915_private *i915,
> > + struct i915_power_well *power_well,
> > + bool timeout_expected)
> > +{
> > + const struct i915_power_well_regs *regs = power_well->desc->ops-
> > >regs;
> > + enum phy phy = icl_aux_pw_to_phy(i915, power_well);
> > + int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
> > +
> > + /*
> > + * WA_14017248603: adlp
> > + * Type-C Phy are taking longer than expected for AUX IO Power
> > Enabling.
> > + * Increase timeout to 500ms.
> > + */
> > + if (IS_ALDERLAKE_P(i915) && intel_phy_is_tc(i915, phy)) {
> > + if (intel_de_wait_for_set(i915, regs->driver,
> > +
> > HSW_PWR_WELL_CTL_STATE(pw_idx), 500)) {
> Feel that v1 patch was pretty simple and clean. Only change required on v1
> patchset was to add a variable for timeout and initialize that variable with
> either 1 or 500 based on the platform.
>
Hi Arun,
If we see the rev1 we were able to see some kernel pointers issue in bat when
we try to
retrieve phy and check if it's type c because hsw_wait_for_power_well_enable is
being used in many
different places and not just where aux c is available which made me go this
way.
Regards,
Suraj Kandpal
> Thanks and Regards,
> Arun R Murthy
> --------------------
> > + drm_dbg_kms(&i915->drm, "%s power well enable
> > timeout\n",
> > + intel_power_well_name(power_well));
> > +
> > + drm_WARN_ON(&i915->drm, !timeout_expected);
> > + }
> > + return;
> > + }
> > +
> > + hsw_wait_for_power_well_enable(i915, power_well,
> > timeout_expected); }
> > +
> > static void
> > icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
> > struct i915_power_well *power_well) @@ -
> > 517,7 +545,7 @@ icl_tc_phy_aux_power_well_enable(struct
> > drm_i915_private *dev_priv,
> > if (DISPLAY_VER(dev_priv) == 11 &&
> > intel_tc_cold_requires_aux_pw(dig_port))
> > icl_tc_cold_exit(dev_priv);
> >
> > - hsw_wait_for_power_well_enable(dev_priv, power_well,
> > timeout_expected);
> > + adl_aux_wait_for_power_well_enable(dev_priv, power_well,
> > +timeout_expected);
> >
> > if (DISPLAY_VER(dev_priv) >= 12 && !is_tbt) {
> > enum tc_port tc_port;
> > --
> > 2.25.1
