> -----Original Message-----
> From: Kandpal, Suraj <[email protected]>
> Sent: Monday, April 3, 2023 1:32 PM
> To: [email protected]
> Cc: Murthy, Arun R <[email protected]>; Sharma, Swati2
> <[email protected]>; Kandpal, Suraj <[email protected]>
> Subject: [PATCH] drm/i915/display: Increase AUX timeout for Type-C
>
> Type-C PHYs are taking longer than expected for Aux IO Power Enabling.
> Workaround: Increase the timeout.
>
> WA: 14017271110
> Bspec: 55480
>
> Signed-off-by: Suraj Kandpal <[email protected]>
> ---
> .../drm/i915/display/intel_display_power_well.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 62bafcbc7937..357617b9b725 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -252,6 +252,7 @@ static void hsw_wait_for_power_well_enable(struct
> drm_i915_private *dev_priv,
> bool timeout_expected)
> {
> const struct i915_power_well_regs *regs = power_well->desc->ops-
> >regs;
> + enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well);
> int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
>
> /*
> @@ -264,6 +265,20 @@ static void hsw_wait_for_power_well_enable(struct
> drm_i915_private *dev_priv,
> return;
> }
>
> + /*
> + * WA: 14017271110
> + * Type-C Phy are taking longer than expected for AUX IO Power
> Enabling.
> + * Increase timeout to 500ms.
> + */
> + if (IS_ALDERLAKE_P(dev_priv) && intel_phy_is_tc(dev_priv, phy)) {
> + if (intel_de_wait_for_set(dev_priv, regs->driver,
> +
> HSW_PWR_WELL_CTL_STATE(pw_idx), 500)) {
> + drm_dbg_kms(&dev_priv->drm, "%s power well
> enable timeout\n",
> + intel_power_well_name(power_well));
> + return;
> + }
> + }
After execution of this on success it will again execute the wait_for() for
HSW_PWR_WELL_CTL_STATE.
Instead can a variable 'delay' be added that can be passed to
intel_de_wait_for_set() and this variable 'delay' can be initialized with
corresponding value.
Thanks and Regards,
Arun R Murthy
-------------------
> +
> /* Timeout for PW1:10 us, AUX:not specified, other PWs:20 us. */
> if (intel_de_wait_for_set(dev_priv, regs->driver,
> HSW_PWR_WELL_CTL_STATE(pw_idx), 1)) {
> --
> 2.25.1
