From: Ville Syrjälä <[email protected]> ILK should work pretty much the same as SNB, except it doesn't have the blitter, so we only care about render tracking.
v2: Rebased against earlier changes Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/i915_reg.h | 2 +- drivers/gpu/drm/i915/intel_pm.c | 2 -- drivers/gpu/drm/i915/intel_ringbuffer.c | 9 ++++++--- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f2104f5..6de26eb 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1091,7 +1091,7 @@ #define ILK_DPFC_CHICKEN 0x43224 #define ILK_FBC_RT_BASE 0x2128 #define ILK_FBC_RT_VALID (1<<0) -#define SNB_FBC_FRONT_BUFFER (1<<1) +#define ILK_FBC_FRONT_BUFFER (1<<1) #define ILK_DISPLAY_CHICKEN1 0x42000 #define ILK_FBCQ_DIS (1<<22) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 059245e..d0f554e 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -214,8 +214,6 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) | (interval << DPFC_RECOMP_TIMER_COUNT_SHIFT)); I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc->y); - if (IS_GEN5(dev)) - I915_WRITE(ILK_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj) | ILK_FBC_RT_VALID); /* enable it... */ I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 426d868..c0db05e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -51,7 +51,7 @@ void __intel_ring_advance(struct intel_ring_buffer *ring) ring->write_tail(ring, ring->tail); } -static int gen6_render_fbc_tracking(struct intel_ring_buffer *ring) +static int gen5_render_fbc_tracking(struct intel_ring_buffer *ring) { int ret; @@ -67,7 +67,7 @@ static int gen6_render_fbc_tracking(struct intel_ring_buffer *ring) intel_ring_emit(ring, ILK_FBC_RT_BASE); if (ring->fbc_address != -1) intel_ring_emit(ring, ring->fbc_address | - SNB_FBC_FRONT_BUFFER | ILK_FBC_RT_VALID); + ILK_FBC_FRONT_BUFFER | ILK_FBC_RT_VALID); else intel_ring_emit(ring, 0); intel_ring_advance(ring); @@ -183,6 +183,9 @@ gen4_render_ring_flush(struct intel_ring_buffer *ring, intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); + if (invalidate_domains && IS_GEN5(dev)) + return gen5_render_fbc_tracking(ring); + return 0; } @@ -308,7 +311,7 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring, intel_ring_advance(ring); if (invalidate_domains) - return gen6_render_fbc_tracking(ring); + return gen5_render_fbc_tracking(ring); return 0; } -- 1.8.3.2 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
