On Fri, 02 Mar 2018, Ville Syrjala <[email protected]> wrote: > From: Ville Syrjälä <[email protected]> > > Parametrize the DVO pipe select bits. > > For consistency with the new way of doing things, let's read out the > pipe select bits even when the port is disable, even though we don't > need that behaviour for asserts in this case. > > Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Jani Nikula <[email protected]> > --- > drivers/gpu/drm/i915/i915_reg.h | 4 +++- > drivers/gpu/drm/i915/intel_dvo.c | 13 ++++--------- > 2 files changed, 7 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index fadd0a285efa..d7dc03bd0b4f 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4423,7 +4423,9 @@ enum { > #define _DVOC 0x61160 > #define DVOC _MMIO(_DVOC) > #define DVO_ENABLE (1 << 31) > -#define DVO_PIPE_B_SELECT (1 << 30) > +#define DVO_PIPE_SEL(pipe) ((pipe) << 30) > +#define DVO_PIPE_SEL_MASK (1 << 30) > +#define DVO_PIPE_SEL_SHIFT 30 > #define DVO_PIPE_STALL_UNUSED (0 << 28) > #define DVO_PIPE_STALL (1 << 28) > #define DVO_PIPE_STALL_TV (2 << 28) > diff --git a/drivers/gpu/drm/i915/intel_dvo.c > b/drivers/gpu/drm/i915/intel_dvo.c > index eb0c559b2715..a86f0398570f 100644 > --- a/drivers/gpu/drm/i915/intel_dvo.c > +++ b/drivers/gpu/drm/i915/intel_dvo.c > @@ -137,19 +137,15 @@ static bool intel_dvo_connector_get_hw_state(struct > intel_connector *connector) > static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, > enum pipe *pipe) > { > - struct drm_device *dev = encoder->base.dev; > - struct drm_i915_private *dev_priv = to_i915(dev); > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dvo *intel_dvo = enc_to_dvo(encoder); > u32 tmp; > > tmp = I915_READ(intel_dvo->dev.dvo_reg); > > - if (!(tmp & DVO_ENABLE)) > - return false; > - > - *pipe = PORT_TO_PIPE(tmp); > + *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT; > > - return true; > + return tmp & DVO_ENABLE; > } > > static void intel_dvo_get_config(struct intel_encoder *encoder, > @@ -276,8 +272,7 @@ static void intel_dvo_pre_enable(struct intel_encoder > *encoder, > dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | > DVO_BLANK_ACTIVE_HIGH; > > - if (pipe == 1) > - dvo_val |= DVO_PIPE_B_SELECT; > + dvo_val |= DVO_PIPE_SEL(pipe); > dvo_val |= DVO_PIPE_STALL; > if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) > dvo_val |= DVO_HSYNC_ACTIVE_HIGH; -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
