Quoting Oscar Mateo (2017-10-13 21:54:15)
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
> b/drivers/gpu/drm/i915/intel_workarounds.c
> index ca9d906..136f6fb 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -517,11 +517,33 @@ static void mmio_workarounds_apply(struct
> drm_i915_private *dev_priv,
> struct i915_wa_reg *wa,
> u32 count)
> {
> + u32 misccpctl;
> + u32 value;
> int i;
>
> for (i = 0; i < count; i++) {
> - u32 value = I915_READ(wa[i].addr);
> + /* WaTempDisableDOPClkGating */
> + if ((IS_BROADWELL(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
> + i915_mmio_reg_equal(wa[i].addr, GEN8_L3SQCREG1)) {
> + misccpctl = I915_READ(GEN7_MISCCPCTL);
> + I915_WRITE(GEN7_MISCCPCTL,
> + misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
> + }
Pre-, post- callbacks? Or a single multiplex?
Otherwise looks quite the hack that will be a nightmare to extend.
-Chris
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